LOW DROPOUT CMOS VOLTAGE REGULATOR

S-818 Series

Seiko Instruments Inc.

13

3. ON/OFF pin (Shutdown pin)

This pin activates and inactivates the regulator.

When the ON/OFF pin is switched to the shutdown level, the operation of all internal circuit stops, the

built-in Pch MOS FET output transistor between VIN and VOUT pin is switched off, suppressing current

consumption. The VOUT pin goes to the Vss level due to internal divided resistance of several M

Ω

between VOUT pin and VSS pin.

The structure of the ON/OFF pin is shown in Figure 13. Since the ON/OFF pin is neither pulled down nor

pulled up internally, do not keep it in the floating state. Current consumption increases if a voltage of

−0.3 V is applied to the ON/OFF pin. When the shutdown pin is not used, connect it to the VIN

pin for product type "A" and to the VSS pin for product type "B".

Table 6 ON/OFF pin function by product type

Product type

ON/OFF pin

Internal circuit

VOUT pin voltage

Current consumption

A

“H”: Power on

Operating

Set value

A

“L”: Shutdown

Stop

B

“H”: Shutdown

Stop

B

“L”: Power on

Operating

Set value

ON/OFF

VIN

VSS

Figure 13 The structure of the ON/OFF Pin

The S-818 Series needs an output capacitor between VOUT pin and VSS pin for phase compensation. A

small ceramic or an OS electrolyte capacitor of 2

µF or more can be used. When a tantalum or an

aluminum electrolyte capacitor is used, the capacitance must be 2

µF or more and the ESR must be 10 Ω

or less.

Attention should be paid not to cause an oscillation due to increase of ESR at low temperatures when an

aluminum electrolyte capacitor is used.

Evaluate the performance including temperature characteristics before prototyping the circuit.

Overshoot and undershoot characteristics differ depending upon the type of the output capacitor. Refer