M41T81S

Clock operation

Doc ID 10773 Rev 7

21/32

Battery low warning

The M41T81S automatically performs battery voltage monitoring upon power-up and at

factory-programmed time intervals of approximately 24 hours. The battery low (BL) bit, bit

D4 of flags register 0Fh, will be asserted if the battery voltage is found to be less than

approximately 2.5 V. The BL bit will remain asserted until completion of battery replacement

and subsequent battery low monitoring tests, either during the next power-up sequence or

the next scheduled 24-hour interval.

If a battery low is generated during a power-up sequence, this indicates that the battery is

below approximately 2.5 volts and may not be able to maintain data integrity. Clock data

should be considered suspect and verified as correct. A fresh battery should be installed.

If a battery low indication is generated during the 24-hour interval check, this indicates that

the battery is near end of life. However, data is not compromised due to the fact that a

nominal VCC is supplied. In order to insure data integrity during subsequent periods of

battery back-up mode, the battery should be replaced.

The M41T81S only monitors the battery when a nominal VCC is applied to the device. Thus

applications which require extensive durations in the battery backup mode should be

powered-up periodically (at least once every few months) in order for this technique to be

beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon

power-up via a checksum or other technique.

Oscillator fail detection

If the oscillator fail bit (OF) is internally set to '1,' this indicates that the oscillator has either

stopped, or was stopped for some period of time and can be used to judge the validity of the

clock and date data.

In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the

STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the

oscillator.

The following conditions can cause the OF bit to be set:

●

The first time power is applied (defaults to a '1' on power-up).

●

The voltage present on VCC is insufficient to support oscillation.

●

The ST bit is set to '1.'

●

External interference of the crystal.

The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have

run for at least 4 seconds before attempting to reset the OF bit to '0.'

Oscillator fail interrupt enable

If the oscillator fail interrupt bit (OFIE) is set to a '1,' the IRQ pin will also be activated. The

IRQ output is cleared by resetting the OFIE or OF bit to '0' (not be reading the flags register).