Frequency (Hz)

95

95.5

96

96.5

97

97.5

98

98.5

99

99.5

100

100.5

1M

10M

D103

Frequency (Hz)

10

0.1

20

0.2

30

0.3

50

0.5

70

0.7

100

1

200

2

300

3

500

5

700

7

1000

10

10

100

1k

10k

100k

1M

10M

100M

D104

1

2

1

2

EQ

T

EQ

C

C

(C

C ) C

C

C

u

u

1

2

EQ

1

2

T

C

C

C

C

C

C

u

22

OPA818

SBOS940A – MAY 2019 – REVISED MARCH 2020

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Copyright © 2019–2020, Texas Instruments Incorporated

With OPA818's 2.7 GHz GBWP, it will be a suitable amplifier for the design requirements. A challenge with the

calculated component results is practically realizing a 0.092 pF capacitor. Such a small capacitor can be realized

by using a capacitive tee network formed by C1, C2, and CT such as that shown in Figure 51. The equivalent

capacitance, CEQ, of the tee network is given by Equation 2.

(2)

The tee network forms a capacitive attenuator from input to output with C1 and CT, and from output to input with

C2 and CT. With the value of CT being higher than C1 or C2, only a fraction of the output signal is seen by C1.

This results in a much smaller shunting current provided to the input through C1 and this reduced shunting

current effect is equivalent to how a much smaller capacitor behaves (at a fixed frequency, smaller capacitor has

higher impedance and thus reduced current). It is recommended to keep the same level of attenuation from input

to output and vice versa. To find the appropriate capacitor values for the tee network, chose an arbitrarily low but

practically realizable and equal values for capacitors C1 and C2, set CEQ = CTOT, and use Equation 3 to get the

value of the tunable capacitor, CT. The values of capacitors C1, C2, and CT in Figure 51 were determined using

this process.

(3)

Figure 53 shows the TINA simulated closed-loop bandwidth response of the circuit in Figure 51. The circuit was

designed for f–3dB = 24 MHz and the simulated closed-loop 3-dB frequency is 24.6 MHz with about 0.1 dB

peaking. The OPA818 TINA model models the input common-mode and differential capacitors so they should not

be added externally when simulating in TINA. The noise simulation of the TIA circuit is shown in Figure 54. The

output referred voltage noise is shown on the Y-axis to the left and the input referred current noise, which is

essentially output referred voltage noise divided by the transimpedance gain of 100k, is shown on the secondary

Y-axis to the right. The simulation results are fairly accurate because the OPA818 TINA model closely models

the voltage and current noise performance of the amplifier. The flat-band output voltage noise is 41 nV/

√Hz that

is equivalent to 0.41 pA/

√Hz of input referred current noise. The noise in relatively low frequency region where

the noise gain of the amplifier is 1 V/V is dominated by the thermal noise of the 100 kΩ resistor (40.7 nV/√Hz at

27°C). At mid frequencies beyond the zero formed by RF and CTOT, the noise gain of the amplifier amplifies the

voltage noise of the amplifier. The amplifier's noise starts to become the dominant noise contributor from this

frequency onwards before the output noise starts to roll off at frequencies beyond the 3-dB closed-loop

bandwidth. When looked at integrated root-mean-square (RMS) noise, the mid-frequency noise will be a

significant contributor and hence using a 2.2 nV/

√Hz low-noise amplifier like OPA818 is advantageous to

minimize total RMS noise in the system.

9.2.1.3 Application Curves

Figure 53. Simulated Closed-Loop Bandwidth of TIA

Figure 54. Simulated TIA Noise