OPA992 datasheet(31/74 Pages) TI2

31 / 74 page

MOSFET switches, other common issues with multiplexers such as charge injection or signal error due to RON

effects are eliminated.

Figure 7-3 shows an example topology for a basic 2:1 multiplexer. When SEL is low, channel 1 is selected and

active; when SEL is high, channel 2 is selected and active. For more information on how to use the OPAx992S

shutdown function, see the shutdown section in Section 5.7.

–

Channel 1

Channel 2

Input

Channel 1

Input

SEL

Output

Figure 7-3. High Voltage Buffered Multiplexer

7.3 Power Supply Recommendations

The OPAx992 is specified for operation from 2.7V to 40V (±1.35V to ±20V); many specifications apply from

–40°C to 125°C or with specific supply voltages and test conditions.

CAUTION

Supply voltages larger than 40V can permanently damage the device; see Section 5.1.

Place 0.1µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or

high-impedance power supplies. For more detailed information on bypass capacitor placement, refer to Section

7.4.

7.4 Layout

7.4.1 Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:

• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and op amp itself.

Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to

the analog circuitry.

– Connect low-ESR, 0.1µF ceramic bypass capacitors between each supply pin and ground, placed as

close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-

supply applications.

• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective

methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.

A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital

and analog grounds paying attention to the flow of the ground current.

• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If

these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed

to in parallel with the noisy trace.

• Place the external components as close to the device as possible. As shown in Figure 7-5, keeping RF and

RG close to the inverting input minimizes parasitic capacitance.

• Keep the length of input traces as short as possible. Always remember that the input traces are the most

sensitive part of the circuit.

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OPA992, OPA2992, OPA4992

SBOSA10F – JUNE 2021 – REVISED MARCH 2024

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