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ICSXXXXCFLFT Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICSXXXXCFLFT Datasheet(HTML) 2 Page - Integrated Circuit Systems |
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2 / 21 page ![]() 2 Integrated Circuit Systems, Inc. ICS932S422C 1412A—12/10/07 Pin Description Pin # PIN NAME PIN TYPE DESCRIPTION 1 VDDPCI PWR Power supply for PCI clocks, nominal 3.3V 2 GNDPCI PWR Ground pin for the PCI outputs 3 PCICLK0 OUT PCI clock output. 4 PCICLK1 OUT PCI clock output. 5 PCICLK2 OUT PCI clock output. 6 PCICLK3 OUT PCI clock output. 7 GNDPCI PWR Ground pin for the PCI outputs 8 VDDPCI PWR Power supply for PCI clocks, nominal 3.3V 9 PCICLK_F0 OUT Free running PCI clock not affected by PCI_STOP# . 10 PCICLK_F1 OUT Free running PCI clock not affected by PCI_STOP# . 11 PCICLK_F2 OUT Free running PCI clock not affected by PCI_STOP# . 12 VDD48 PWR Power pin for the 48MHz output.3.3V 13 48MHz OUT 48MHz clock output. 14 GND48 PWR Ground pin for the 48MHz outputs 15 VDDSRC PWR Supply for SRC clocks, 3.3V nominal 16 NC N/A No Connection. 17 Vtt_PwrGd#/PD IN Vtt_PwrGd# is an active low input used to determine when latched inputs are ready to be sampled. PD is an asynchronous active high input pin used to put the device into a low power state. The internal clocks, PLLs and the crystal oscillator are stopped. 18 SRCCLKC1 OUT Complement clock of differential push-pull SRC clock pair. 19 SRCCLKT1 OUT True clock of differential SRC clock pair. 20 GNDSRC PWR Ground pin for the SRC outputs 21 SRCCLKT2 OUT True clock of differential SRC clock pair. 22 SRCCLKC2 OUT Complement clock of differential SRC clock pair. 23 SRCCLKC3 OUT Complement clock of differential SRC clock pair. 24 SRCCLKT3 OUT True clock of differential SRC clock pair. 25 VDDSRC PWR Supply for SRC clocks, 3.3V nominal 26 SRCCLKT4 OUT True clock of differential SRC clock pair. 27 SRCCLKC4 OUT Complement clock of differential SRC clock pair. 28 VDDSRC PWR Supply for SRC clocks, 3.3V nominal |
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