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ICSXXXXCGLFT Datasheet(PDF) 14 Page - Integrated Circuit Systems

Part # ICSXXXXCGLFT
Description  PCIe Gen 2 main Clock for Intel-based Servers
PDF  21 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICSXXXXCGLFT Datasheet(HTML) 14 Page - Integrated Circuit Systems

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14
Integrated
Circuit
Systems, Inc.
ICS932S422C
1412A—12/10/07
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU N Div8
N Divider Prog bit 8
RW
X
Bit 6
CPU N Div9
N Divider Prog bit 9
RW
X
Bit 5
CPU M Div5
RW
X
Bit 4
CPU M Div4
RW
X
Bit 3
CPU M Div3
RW
X
Bit 2
CPU M Div2
RW
X
Bit 1
CPU M Div1
RW
X
Bit 0
CPU M Div0
RW
X
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU N Div7
RW
X
Bit 6
CPU N Div6
RW
X
Bit 5
CPU N Div5
RW
X
Bit 4
CPU N Div4
RW
X
Bit 3
CPU N Div3
RW
X
Bit 2
CPU N Div2
RW
X
Bit 1
CPU N Div1
RW
X
Bit 0
CPU N Div0
RW
X
SMBus Table: CPU Spread Spectrum Control Register
Byte 13
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU SSP7
RW
X
Bit 6
CPU SSP6
RW
X
Bit 5
CPU SSP5
RW
X
Bit 4
CPU SSP4
RW
X
Bit 3
CPU SSP3
RW
X
Bit 2
CPU SSP2
RW
X
Bit 1
CPU SSP1
RW
X
Bit 0
CPU SSP0
RW
X
SMBus Table: CPU Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
0
Bit 6
CPU SSP14
RW
X
Bit 5
CPU SSP13
RW
X
Bit 4
CPU SSP12
RW
X
Bit 3
CPU SSP11
RW
X
Bit 2
CPU SSP10
RW
X
Bit 1
CPU SSP9
RW
X
Bit 0
CPU SSP8
RW
X
The decimal representation of
M and N Divider in Byte 11 and
12 will configure the CPU VCO
frequency. Default at power
up = latch-in or Byte 0 Rom
table. VCO Frequency =
14.318 x [NDiv(9:0)+8] /
[MDiv(5:0)+2]
Spread Spectrum
Programming bit(7:0)
N Divider Programming
Byte12 bit(7:0) and
Byte11 bit(7:6)
Reserved
These Spread Spectrum bits in
Byte 13 and 14 will program
the spread pecentage of CPU
The decimal representation of
M and N Divider in Byte 11 and
12 will configure the CPU VCO
frequency. Default at power
up = latch-in or Byte 0 Rom
table. VCO Frequency =
14.318 x [NDiv(9:0)+8] /
[MDiv(5:0)+2]
M Divider Programming
bit (5:0)
These Spread Spectrum bits in
Byte 13 and 14 will program
the spread pecentage of CPU
Spread Spectrum
Programming bit(14:8)
Byte 12
Byte 14
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Byte 11
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