L99DZ300G datasheet(94/157 Pages) STMICROELECTRONICS

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Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

WT5

WT4

WT3

WT2

WT1

WT0

Watchdog timeout/long open window WT[5:0] * 5 ms

OW2

OW1

OW0

CW2

CW1

CW0

Open window OW[2:0] *

Closed window CW[2:0] *

5 ms

Invalid

<WD type 1>: 3CH (long open window: 300 ms)

<WD type 2>: 91H (open window: 10 ms, closed window: 5 ms)

<WD type 1> indicates the long open window (timeout) which is opened at the start of the watchdog. The binary

value of WT [5:0] times 5 ms indicates the typical value of the timeout time.

<WD type 2> describes the default timing of the window watchdog.

The binary value of CW [2:0] times 5 ms defines the typical closed window time (tCW) and OW [2:0] times 5 ms

defines the typical open window time (tOW). See Figure 46. Window watchdog operation, which recalls with

Figure 4. Watchdog timing tCW = TEFW and tOW = TLFW - TEFW

Figure 46. Window watchdog operation

tLOW

tCW

tOW

tCW

tOW

tCW

tOW

tLOW

tCW

tLOW

tOWF

WD-

Tigger

normal

operation

missing

trigger

early

write

time

= correct trigger timing

= early trigger timing

= missing trigger

tCW = closed window

tLOW = long open window

tOW = open window

= tCW + tOW = open window fail

tOWF

The watchdog trigger bit location is defined by the <WD bit pos. X> registers.

L99DZ300G

Serial peripheral interface (SPI)

DS13902 - Rev 11

page 94/157

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