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TDP142 Datasheet(PDF) 14 Page - Texas Instruments |
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TDP142 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 36 page ![]() CFG pins VCC Internal Power Good TDP142 td_pg tcfg_su tcfg_hd 14 TDP142 SLLSEZ1C – SEPTEMBER 2017 – REVISED MAY 2019 www.ti.com Product Folder Links: TDP142 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated (1) Following pins comprise CFG pins: I2C_EN, DPEQ[1:0]. (2) Recommend CFG pins are stable when VCC is at min. 8.4.4 Operation Timing – Power Up Figure 10. Power-Up Timing Table 3. Power-Up Timing(1)(2) PARAMETER MIN MAX UNIT td_pg VCC (minimum) to Internal Power Good asserted high 500 µs tcfg_su CFG(1) pins setup(2) 50 µs tcfg_hd CFG(1) pins hold 10 µs tVCC_RAMP VCC supply ramp requirement 100 ms |
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