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TMP61 Datasheet(PDF) 13 Page - Texas Instruments |
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TMP61 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 29 page ![]() the voltage measured across it increases linearly with temperature. As such, the need for a linearization circuits is no longer a requirement, and a simple current source or a voltage divider circuit can be used to generate the temperature voltage. This output voltage can be interpreted using a comparator against a voltage reference to trigger a temperature trip point that is either tied directly to an ADC to monitor temperature across a wider range or used as feedback input for an active feedback control circuit. The voltage across the TMP64, as described in Equation 2, can be translated to temperature using either a lookup table method (LUT) or a fitting polynomial, V(T). The Thermistor Design Tool must be used to translate Vtemp to Temperature. The temperature voltage must first be digitized using an ADC. The necessary resolution of this ADC is dependent on the biasing method used. Additionally, for best accuracy, the bias voltage (VBIAS) should be tied to the reference voltage of the ADC to create a measurement where the difference in tolerance between the bias voltage and the reference voltage cancels out. The engineer can also implement a low-pass filter to reject system level noise, and the user should place the filter as close to the ADC input as possible. 9.2.1.2 Detailed Design Procedure The resistive circuit divider method produces an output voltage (VTEMP) scaled according to the bias voltage (VBIAS). When VBIAS is also used as the reference voltage of the ADC, any fluctuations or tolerance error due to the voltage supply is canceled and does not affect the temperature accuracy. This type of configuration is shown in Figure 9-2. Equation 2 describes the output voltage (VTEMP) based on the variable resistance of the TMP64 (RTMP64) and bias resistor (RBIAS). The ADC code that corresponds to that output voltage, ADC full-scale range, and ADC resolution is given in Equation 3. R Bias V Bias R TMP64 C Filter R Filter IN IN REF GND ADC Figure 9-2. TMP64 Voltage Divider With an ADC TMP64 TEMP BIAS BIAS TMP64 R V V R R § · u ¨ ¸ © ¹ (2) n TEMP V ADC Code 2 FSR § · u ¨ ¸ © ¹ (3) where • FSR is the full-scale range of the ADC, which is the voltage at REF to GND (VREF) • n is the resolution of the ADC Equation 4 shows whenever VREF = VBIAS, VBIAS cancels out. www.ti.com TMP64 SNIS212C – DECEMBER 2019 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TMP64 |
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