TMUX821x 100-V, Flat Ron, 1:1 (SPST), 4-Channel Switches

with Latch-Up Immunity and 1.8-V Logic

1 Features

• High supply voltage capable:

– Dual supply: ±10 V to ±50 V

– Single supply: 10 V to 100 V

– Asymmetric dual supply operation

• Consistent parametric across supply voltages

• Latch-up immune

• High continuous current: 200 mA

• Low crosstalk: –110 dB

• Low input leakage: 10 pA

• Low On-Resistance flatness: 0.05 Ω

• Low On-Resistance: 5 Ω

• Low capacitance: 12 pF

• Removes need for additional logic rail (VL)

• 1.8-V Logic capable

• Fail-safe logic: up to 48 V independent of supply

• Integrated Pull-Down resistor on logic pins

• Bidirectional signal path

• Wide operating temperature TA: –40°C to 125°C

• Industry-standard TSSOP and

smaller WQFN packages

2 Applications

• High voltage bidirectional switching

• Analog and digital signal switching

• Semiconductor test equipment

• LCD test equipment

• Battery test equipment

• Data acquisition systems (DAQ)

• Digital multi-meter (DMM)

• Factory automation and control

• Programmable logic controllers (PLC)

• Analog input modules

3 Description

The TMUX8211, TMUX8212, and TMUX8213 are

modern high voltage capable analog switches

with Latch-Up immunity. Each device has four

independently controllable 1:1, single-pole single-

throw (SPST) switch channels. The devices work well

with dual supplies, a single supply, or asymmetric

supplies up to a maximum supply voltage of 100 V.

The TMUX821x devices provide consistent analog

parametric performance across the entire supply

voltage range. The TMUX821x family supports

bidirectional analog and digital signals on the source

(Sx) and drain (Dx) pins.

All logic inputs support logic levels of 1.8 V, 3.3 V, and

5 V and can be connected as high as 48 V, allowing

for system flexibility with control signal voltage. Fail-

safe logic circuitry allows voltages on the logic pins to

be applied before the supply pin, protecting the device

from potential damage.

The device family provides Latch-Up immunity,

preventing undesirable high current events between

parasitic structures within the device. A Latch-Up

condition typically continues until the power supply

rails are turned off and can lead to device failure.

The Latch-Up immunity feature allows this family of

multiplexers to be used in harsh environments.

Package Information(1) (2)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

TMUX8211

TMUX8212

TMUX8213

PW (TSSOP, 16)

5.00 mm × 4.40 mm

RUM (WQFN, 16)

4.00 mm × 4.00 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

(2)

See the Device Comparison Table.

S1

S2

S3

S4

SEL1

SEL2

SEL3

SEL4

D1

D2

D3

D4

TMUX8211

S1

S2

S3

S4

D1

D2

D3

D4

TMUX8212

S1

S2

S3

S4

D1

D2

D3

D4

TMUX8213

SEL1

SEL2

SEL3

SEL4

SEL1

SEL2

SEL3

SEL4

ALL SWITCHES SHOWN FOR A LOGIC 0 INPUT

Functional Block Diagram

TMUX8211, TMUX8212, TMUX8213

SCDS434B – OCTOBER 2021 – REVISED MARCH 2023

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.