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LT8625SP Datasheet(PDF) 9 Page - Analog Devices |
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LT8625SP Datasheet(HTML) 9 Page - Analog Devices |
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9 / 44 page ![]() Data Sheet LT83401/LT83402 analog.com Rev. 0 9 of 44 PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS Figure 3. Pin Configurations Table 3. Pin Descriptions PIN NAME DESCRIPTION 1 RT A resistor is connected between the RT and ground to set the switching frequency. 2 PG The PG pin is the open-drain output of an internal comparator. PG remains high impedance until the PGFB pin is within ±7.5% of 0.5V, and there are no fault conditions. PG is pulled low when EN/UVLO is below 0.75V, INTVCC has fallen too low, or during thermal shutdown. PG is valid when VIN is above 2.8V. 3 SYNC/MODE For the LT83401/LT83402, this pin programs three different operating modes: 1) Pulse- Skipping Mode: Connect this pin to GND for pulse-skipping mode for improved efficiency at light loads. 2) Forced Continuous Mode (FCM): This mode offers fast transient response and full frequency operation over a wide load range. Connect this pin high to INTVCC (~3.4V) or an external supply greater than 1.5V for FCM. The part also operates in this mode by default if this pin is left floating. 3) Synchronization Mode: Drive this pin with a clock source to synchronize to an external frequency. During synchronization, the part operates in forced continuous mode. The SYNC/MODE pin can be toggled during operation to change the operating mode. Contact the factory for versions of this part that replace the SYNC/MODE pin with a CLKOUT pin. The CLKOUT pin would provide a 50% duty-cycle square wave of the switching frequency, 180° out- of-phase with the internal clock of the part, with a peak-to-peak amplitude of INTVCC to GND. LFCSP PACKAGE 15-LEAD (3mm × 2mm × 0.75mm) JEDEC BOARD θJA = 50°C/W, θJC(TOP) = 67.1°C/W, θJC(PAD) = 10.4°C/W DEMO BOARD θJA = 33°C/W, ψJT = 1.7°C/W EXPOSED PAD IS GND AND SHOULD BE SOLDERED TO PCB 1 RT 2 PG 3 SYNC/MODE 4 VIN 8 VIN 9 BST 10 INTVCC 11 EN/UVLO LT83401/LT83402 TOP VIEW 16 GND |
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