Copyright © 2016

Microsemi

Page 5

Rev. 1.4, July 2017

CPG

– PoE BU

One Enterprise Aliso Viejo, CA 92656 USA

PD70211

PD Controller with Switching Regulator for

AF/AT/UPOE/HDBaseT/4-pair PoE Applications

Pin

Number

Designator

Description

16

RFREQ

Connect a programming resistor from this pin to IC ground (pin GND) to set the switching

frequency. A typical value of the programming resistor is 49.9k, and this value will provide a

frequency between 215kHz. Halving it will roughly double the frequency, whereas doubling

it will halve the frequency. Note that the converter is designed to operate from 100 to 500

kHz based on this pin.

Switching Frequency Equation:

������������������������ =

1

(90������������ ������������������������������)+ 150������������

where Freq is [Hz] and RFREQ in [Ω]

For further information refer to Setting Switching Frequency.

17

SS

This is the soft-start pin. Typically a 0.1µF cap, the “soft-start capacitor”, is connected

between this pin and IC ground (pin GND). The capacitor gets charged up to 1.2V by an

internal resistor, and the voltage on the cap in effect forms the input voltage reference VREF

of the error amplifier. But note that this capacitor serves other functions too; for example,

it controls the rate of hiccupping under overcurrent fault conditions. So even if the internal

reference is not being used (as in isolated topologies with a TL431 on the Secondary side),

the soft-stat cap is always recommended to be in place. The actual capacitor used will be

determined by the application. For further information refer to Setting Soft-Start.

18

RCLP

Low power clamp resistor. We can connect a resistor from this pin to IC ground (pin GND)

to set the exact level at which pulse-skipping mode is entered at light loads. However, the

usual default is to connect this pin directly to IC ground, in which case pulse-skipping mode

is disabled. The method to select the threshold (and RCLP resistor value) is described in the

Applications Information section of this datasheet.

19

VSN

The negative input of the internal differential-sense voltage amplifier. Note that the

common-mode range of the differential voltage amplifier is 3.5V and its gain is 7. We can

use this differential amplifier for implementing topologies where the “system (output)

ground” is different from the IC ground. We can then step-down both output rails (output

rail and its return), by equal amounts, using identical voltage dividers, to bring the voltage

below 3.5V, then use differential sensing, and finally connect the output of the differential

voltage amplifier (pin DAO) to FB pin.

20

VSP

The positive input of the internal differential-sense voltage amplifier. Note that it must

always be connected in such a way that VSP is at a higher voltage than VSN. Also keep in

mind that since the differential voltage amplifier has a gain of 7 and the output of that amp

is connected to the feedback pin which compares that against a 1.2V reference, in effect,

the difference between VSP and VSN stabilizes to 1.2V/7 = 0.171V in steady state. That is

how we design the (identical) voltage dividers present on VSP and VSN.