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TPS61165DBVT Datasheet(PDF) 22 Page - Texas Instruments |
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TPS61165DBVT Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 38 page ![]() A D(max) JA 125 C T P R q ° - = 22 TPS61165 SLVS790E – NOVEMBER 2007 – REVISED APRIL 2019 www.ti.com Product Folder Links: TPS61165 Submit Documentation Feedback Copyright © 2007–2019, Texas Instruments Incorporated 11.3 Thermal Considerations The maximum device junction temperature must be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation of the TPS61165. Calculate the maximum allowable dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 8: where • TA is the maximum ambient temperature for the application • RθJA is the thermal resistance junction-to-ambient given in Thermal Information (8) The TPS61165 comes in a thermally enhanced QFN package. This package includes a thermal pad that improves the thermal capabilities of the package. The RθJA of the QFN package greatly depends on the PCB layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using thermal vias underneath the thermal pad as illustrated in the layout example. Also see the QFN/SON PCB Attachment application report (SLUA271). |
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