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FPD3000 Datasheet(PDF) 2 Page - Filtronic Compound Semiconductors

Part # FPD3000
Description  2W POWER PHEMT
PDF  3 Pages
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Manufacturer  FILTRONIC [Filtronic Compound Semiconductors]
Direct Link  http://www.filtronic.co.uk/
Logo FILTRONIC - Filtronic Compound Semiconductors

FPD3000 Datasheet(HTML) 2 Page - Filtronic Compound Semiconductors

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Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
Tel: +44 (0) 1325 301111
Fax: +44 (0) 1325 306177
Email: sales@filcs.com
Website: www.filtronic.com
2
Datasheet v3.0
FPD3000
ABSOLUTE MAXIMUM RATING
1:
PARAMETER
SYMBOL
TEST CONDITIONS
ABSOLUTE MAXIMUM
Drain-Source Voltage
VDS
-3V < VGS < -0.5V
6
10V
Gate-Source Voltage
VGS
0V < VDS < +8V
-3V
Drain-Source Current
IDS
For VDS > 2V
IDss
Gate Current
IG
Forward or reverse current
25mA
RF Input Power
PIN
Under any acceptable bias state
600mW
Channel Operating Temperature
TCH
Under any acceptable bias state
175°C
Storage Temperature
TSTG
Non-Operating Storage
-65°C to 150°C
Total Power Dissipation
PTOT
See De-Rating Note below
7.3W
Simultaneous Combination of Limits
4
2 or more Max. Limits
80%
Notes:
1T
Ambient = 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause
permanent damage to the device
2Total Power Dissipation defined as: P
TOT ≡ (PDC + PIN) – POUT,
where PDC: DC Bias Power, PIN: RF Input Power, POUT: RF Output Power
3Total Power Dissipation to be de-rated as follows above 22
°C:
PTOT= 7.3 - (0.05W/°C) x THS
where THS= heatsink or ambient temperature above 22°C
Example: For a 85
°C carrier temperature: P
TOT = 7.3 - (0.05 x (85 – 22)) = 4.2W
4Users should avoid exceeding 80% of 2 or more Limits simultaneously
5 Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
6 Operating at absolute maximum VD continuously is not recommended. If operation at 10V is considered then
IDS must be reduced in order to keep the part within it's thermal power dissipation limits. Therefore VGS is
restricted to < -0.5V.
PAD LAYOUT:
Note: Co-ordinates are referenced from the bottom left hand corner of the die to the centre of bond pad opening
PAD
DESCRIPTION
PIN
COORDINATES
(µm)
A1/A2/A3/A4
Gate Pads
125, 625/475/325/175
B1/B2/B3/B4
Drain Pads
375, 625/475/325/175
C
Source Pad
A1
A2
B1
B2
A3
A4
B3
B4
C
DIE SIZE
(
µm)
DIE THICKNESS (
µm)
MIN. BOND PAD OPENING
(
µm x µm )
470 x 830
75
75 x 60



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