MLX90255 datasheet(4/5 Pages) MELEXIS

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MLX90255

Linear Optical Array

MLX90255 Linear Optical Array

Page 4 of 5

Rev 1.0 31-May-01

dependent. For the MLX90255 the responsivity

will peak at about 770nm.

Bill of Materials for the demo

•

an MLX90255 demo board with on-board

sensor device

•

optionally an external device connected to

the 5 pins header

•

a regulated power supply (6…10VDC)

•

an oscilloscope

Operation

To operate the demo board the following steps

are necessary:

•

apply 6…10VDC to the board

•

connect

oscilloscope

probe

the

VOUTA or VOUTB pin (depending on the

actual device of interest) and the scope

ground to the GND terminal

•

connect a second oscilloscope probe to the

SI terminal, and use this channel as a

triggering input

•

select the appropriate integration time and

CLK frequency. If the amount of impinging

energy is relatively large, a short integration

time

necessary

prevent

complete

saturation of the output.

Timing diagram

The first scan after power up is incorrect: the

chip needs 1 SI pulse and 133 CLK pulses to

initialize the complete device. The second SI

pulse is valid and starts the integration time after

18 clock pulses (see device specification). A

next SI pulse ends the integration time, and the

pixel values are scanned out to the output pin at

the rate of CLK.

Note that it is perfectly possible to stop the CLK

pulses after the 133

rd. After each SI pulse, 133

CLK pulses are necessary however.

When an SI pulse is given the chip always does

2 things:

•

It clocks out the former data of the pixels to

the OUT pin, at the rate of the CLK signal.

•

The device is in a reset state until the falling

edge of the 18

th CLK pulse. At that moment

the integration time starts.

Some oscilloscope screenshots to make it even more clear.

Integration Time

1st SI pulse

2nd SI pulse

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