ADIS16354SLASHPCBZ datasheet(16/28 Pages) AD

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ADIS16354

Rev. 0 | Page 16 of 28

PROGRAMMING AND CONTROL

CONTROL REGISTER OVERVIEW

The ADIS16354 offers many programmable features controlled

by writing commands to the appropriate control registers using the

SPI. The following sections describe these controls and specify

each function, along with the corresponding register configura-

tion. The features available for configuration in this register

space are:

•

Calibration

•

Global commands

•

Operational control

•

Sample rate

•

Power management

•

Digital filtering

•

Dynamic range

•

DAC output

•

Digital input/output

•

Operational status and diagnostics

•

Self-test

•

Status conditions

•

Alarms

CONTROL REGISTER STRUCTURE

The ADIS16354 uses a temporary, RAM-based memory struc-

ture to facilitate the control registers listed in Table 10. The

operational configuration is stored in a flash memory structure

that automatically loads into the control registers during the

start-up sequence. Each nonvolatile register has a corresponding

flash memory location for storing the latest configuration

contents. The contents of each nonvolatile register must be

stored to flash manually.

Note that the contents of these registers are nonvolatile after they

are stored to flash. The flash update command, available in the

COMMAND register, provides this function. The ENDURANCE

ment against the flash memory’s write cycle specification.

Table 10. Control Register Mapping

Type

Volatility

Addresses

Bytes

Function

Reference Tables

ENDURANCE

Nonvolatile

0x00, 0x01

Flash memory write count

Table 30

Volatile

0x02 to 0x17

Output data

Table 7

0x18, 0x19

Reserved

XGYRO_OFF

R/W

Nonvolatile

0x1A, 0x1B

X-axis gyroscope bias offset factor

Table 11, Table 12

YGYRO_OFF

R/W

Nonvolatile

0x1C, 0x1D

Y-axis gyroscope bias offset factor

Table 11, Table 12

ZGYRO_OFF

R/W

Nonvolatile

0x1E, 0x1F

Z-axis gyroscope bias offset factor

Table 11, Table 12

XACCL_OFF

R/W

Nonvolatile

0x20, 0x21

X-axis acceleration bias offset factor

Table 13, Table 14

YACCL_OFF

R/W

Nonvolatile

0x22, 0x23

Y-axis acceleration bias offset factor

Table 13, Table 14

ZACCL_OFF

R/W

Nonvolatile

0x24, 0x25

Z-axis acceleration bias offset factor

Table 13, Table 14

ALM_MAG1

R/W

Nonvolatile

0x26, 0x27

Alarm 1 amplitude threshold

Table 33, Table 34

ALM_MAG2

R/W

Nonvolatile

0x28, 0x29

Alarm 2 amplitude threshold

Table 33, Table 34

ALM_SMPL1

R/W

Nonvolatile

0x2A, 0x2B

Alarm 1 sample period

Table 35, Table 36

ALM_SMPL2

R/W

Nonvolatile

0x2C, 0x2D

Alarm 2 sample period

Table 35, Table 36

ALM_CTRL

R/W

Nonvolatile

0x2E, 0x2F

Alarm control

Table 37, Table 38

AUX_DAC

R/W

Volatile

0x30, 0x31

Auxiliary DAC data

Table 23, Table 24

GPIO_CTRL

R/W

Volatile

0x32, 0x33

Auxiliary digital input/output control

Table 25, Table 26

MSC_CTRL

R/W

Nonvolatile1

0x34, 0x35

Miscellaneous control

Table 28, Table 29

SMPL_PRD

R/W

Nonvolatile

0x36, 0x37

Internal sample period (rate) control

Table 17, Table 18

SENS/AVG

R/W

Nonvolatile

0x38, 0x39

Dynamic range/digital filter control

Table 21, Table 22

SLP_CNT

R/W

Volatile

0x3A, 0x3B

Sleep mode control

Table 19, Table 20

STATUS

Volatile

0x3C, 0x3D

System status

Table 31, Table 32

COMMAND

N/A

0x3E, 0x3F

System command

Table 15, Table 16

1 The contents of the lower byte are nonvolatile; the contents of the upper byte are volatile.

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