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RF2174
Rev A8 DS060918
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Pin
Function
Description
Interface Schematic
1GND
Internally connected to the ground slug.
See pin 15.
2AT_EN
Control input for the PIN diode. The purpose of the PIN diode is to attenu-
ate the RF input drive level when the VAPC is low. This serves both to
reduce the leakage through the device cause by self biasing when driving
with high level at the RF input, as well as to maintain a good input match
when the bias of the input stage is turned off. When this pin is “high” the
PIN diode control is turned on. See the Theory of Operation for more
details.
3RF IN
RF Input. This is a 50
Ω input, but the actual impedance depends on the
interstage matching network connected to pin 5. An external DC blocking
capacitor is required if this port is connected to a DC path to ground or a
DC voltage.
4GND1
Ground connection for the pre-amplifier stage. Keep traces physically short
and connect immediately to the ground plane for best performance. It is
important for stability that this pin has it’s own vias to the groundplane, to
minimize any common inductance.
See pin 3.
5VCC1
Power supply for the pre-amplifier stage and interstage matching. This pin
forms the shunt inductance needed for proper tuning of the interstage
match. Please refer to the application schematic for proper configuration,
and note that position and value of the components are important.
See pin 3.
6APC1
Power Control for the driver stage and pre-amplifier. When this pin is "low,"
all circuits are shut off. A "low" is typically 0.5V or less at room tempera-
ture. A shunt bypass capacitor is required. During normal operation this pin
is the power control. Control range varies from about 1.0V for -10dBm to
2.6V for +33dBm RF output power. The maximum power that can be
achieved depends on the actual output matching; see the application infor-
mation for more details. The maximum current into this pin is 5mA when
VAPC1=2.6V, and 0mA when VAPC=0V.
7APC2
Power Control for the output stage. See pin 6 for more details.
See pin 6.
8VCC
Power supply for the bias circuits.
See pin 6.
9GND
Internally connected to the ground slug.
10
RF OUT
RF Output and power supply for the output stage. Bias voltage for the final
stage is provided through this wide output pin. An external matching net-
work is required to provide the optimum load impedance.
11
RF OUT
Same as pin 10.
Same as pin 10.
12
RF OUT
Same as pin 10.
Same as pin 10.
13
2F0
Connection for the second harmonic trap. This pin is internally connected
to the RF OUT pins. The bonding wire together with an external capacitor
form a series resonator that should be tuned to the second harmonic fre-
quency in order to increase efficiency and reduce spurious outputs.
Same as pin 10.
14
VCC2
Same as pin 15.
G ND1
To PIN
diode
3k
Ω
AT_EN
RF IN
GND 1
VCC1
From Bias
Stages
PIN
From Attn
control circuit
GND
VC C
To R F
Sta g e s
G ND
A PC
GND
PCKG BASE
RF OUT
From Bias
Stages
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