AD8067 datasheet(21/24 Pages) AD

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AD8067

Rev. A | Page 21 of 24

FREQUENCY – MHz

0.1

100

AD8067

0.1

μF

+5V

–5V

AD8009

0.001

μF

0.1

μF

+5V

C11

0.01

μF

C10

0.001

μF

–5V

μF

0.1

μF

INPUT

200

21.5

OUTPUT

51.1

4.99k

μF

5pF

Figure 57. AD8067/AD8009 Composite Amplifier AV = 100, GBWP = 6.1 GHz

Figure 58. Gain Bandwidth Response

The composite amplifier is set for a gain of 100. The overall gain

is set by

M 25ns CH1

CH1 1V

C1 AMPL

The output stage is set for a gain of 10; therefore, the AD8067

has an effective gain of 10, thereby allowing it to maintain a

bandwidth in excess of 55 MHz.

The circuit can be tailored for different gain values; keeping the

ratios roughly the same ensures that the bandwidth integrity is

maintained. Depending on the board layout, Capacitor C5 can

be required to reduce ringing on the output. The gain bandwidth

and pulse responses are shown in Figure 58, Figure 59, and

Figure 60.

Figure 59. Large Signal Response

Layout of this circuit requires attention to the routing and

length of the feedback path. It should be kept as short as

possible to minimize stray capacitance.

M 25ns CH1

C1 AMPL

480mV

CH1 200mV

Figure 60. Small Signal Response

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