W191

Rev 1.0, November 20, 2006

Page 4 of 9

Stresses greater than those listed in this table may cause

permanent damage to the device. These represent a stress

rating only. Operation of the device at these or any other condi-

tions above those specified in the operating sections of this

specification is not implied. Maximum conditions for extended

periods may affect reliability.

[4]

Parameter

Description

Rating

Unit

Voltage on any pin with respect to GND

–0.5 to + 7.0

V

Storage Temperature

–65 to + 150

°C

Ambient Temperature under Bias

–55 to + 125

°C

Operating Temperature (Commercial)

0 to + 70

°C

Operating Temperature (Industrial)

–40 to + 85

°C

Parame-

ter

Description

Test Condition

Min.

Typ.

Max.

Unit

3.3V Supply Current

BUF_IN = 100 MHz

173

mA

3.3V Supply Current in three-state

BUF_IN = 100 MHz

5

mA

Logic Inputs (BUF_IN, OE, SCLOCK, SDATA)

Input Low Voltage

GND–0.3

0.8

V

Input High Voltage

2.0

V

Input Leakage Current, BUF_IN

–5

+5

µA

–20

+5

µA

Logic Outputs (SDRAM0:5)

Output Low Voltage

50

mV

Output High Voltage

3.1

V

Output Low Current

65

100

160

mA

Output High Current

70

110

185

mA

Pin Capacitance/Inductance

Input Pin Capacitance (Except BUF_IN)

5

pF

Output Pin Capacitance

6

pF

Input Pin Inductance

7nH

Notes:

3. Multiple supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.

4. Outputs loaded by 6” 60

transmission lines with 20 pF capacitors.

5. OE, SCLOCK, and SDATA logic pins have a 250-k

internal pull-up resistor (not CMOS level).