W196

Rev 1.0, November 28, 2006

Page 3 of 11

Pin Definitions

Pin Name

Pin

No.

Pin

Type

Pin Description

CPU0:1

22, 21

O

CPU Clock Outputs 0 through 1: These two CPU clocks run at a frequency set by

FS0:1 or the serial data interface. See Table 1 and Table 5. Output voltage swing is

set by the voltage applied to VDDQ2.

PCI1:6

PCI_F

5, 6, 7, 8, 10,

11, 4

O

PCI Bus Clock Outputs 1 through 6 and PCI_F: These seven PCI clock outputs

run synchronously to the CPU clock. Voltage swing is set by the power connection

to VDDQ3.

IOAPIC

24

O

I/O APIC Clock Output: Provides 14.318-MHz fixed frequency. The output voltage

swing is set by the power connection to VDDQ2.

48MHz

13

O

48-MHz Output: Fixed 48-MHz USB clock. Output voltage swing is controlled by

voltage applied to VDDQ3.

24_48MHz/FS1

14

I/O

24-MHz or 48-MHz Output/Frequency Select 1 Input: Frequency is set by the state

of pin 27 on power-up. This pin doubles as the select strap to determine device

operating frequency as described in Table 1.

REF2X/SEL48#

27

I/O

I/O Dual-Function REF2X and SEL48# Pin: Upon power-up, the state of SEL48#

14 will output 2 4MHz. After 2 ms, the pin becomes a high-drive output that produces

a copy of 14.318 MHz.

FS0

16

I

Frequency Selection 0 Input: Selects CPU clock frequency as shown in Table 1

on page 1.

SDATA

18

I/O

of this data sheet. Internal 250-k

pull-up resistor.

SCLOCK

17

I

X1

1

I

Crystal Connection or External Reference Frequency Input: Connect to either

a 14.318-MHz crystal or other reference signal.

X2

2

I

Crystal Connection: An input connection for an external 14.318-MHz crystal. If

using an external reference, this pin must be left unconnected.

VDDQ3

9, 12, 20, 26

P

Power Connection: Power supply for core logic and PLL circuitry, PCI, 48/24MHz,

and Reference output buffers. Connect to 3.3V supply.

VDDQ2

23, 25

P

Power Connection: Power supply for IOAPIC and CPU output buffers. Connect to

2.5V supply.

GND

3, 15, 19, 28

G

Ground Connections: Connect all ground pins to the common system ground

plane.