W196

Rev 1.0, November 28, 2006

Page 7 of 11

Note:

2. CPU and PCI frequency selections are listed in Table 1 and Table 5.

Table 5. Additional Frequency Selections through Serial Data Interface Data Bytes

Input Conditions

Data Byte 3, Bit [7:4, 1:0]

Output Frequency

If Spread Is On

Bit [1:0]

Bit 7

SEL_3

Bit 6

SEL_2

Bit 5

SEL_1

Bit 4

SEL_0

CPU, SDRAM

Clocks (MHz)

PCI Clocks

(MHz)

Spread Percentage

00

0

0

0

0

78

39

OFF

00

0

0

0

1

81

40.5

OFF

00

0

0

1

0

113.5

37.8

OFF

00

0

0

1

1

66.8

33.4

OFF

00

0

1

0

0

117

39

OFF

00

0

1

0

1

118.5

39.5

OFF

00

0

1

1

0

122

37.3

OFF

00

0

1

1

1

100

33.3

OFF

00

1

0

0

0

126

31.5

OFF

00

1

0

0

1

135

33.75

OFF

00

1

0

1

0

137

34.25

OFF

00

1

0

1

1

138.5

34.62

OFF

00

1

1

0

0

142

35.5

OFF

00

1

1

0

1

144

36

OFF

00

1

1

1

0

155

38.75

OFF

00

1

1

1

1

133.3

33.3

OFF

10

0

0

0

0

124

41.3

±0.5% Center

10

0

0

0

1

75

37.5

±0.5% Center

10

0

0

1

0

83.3

41.65

±0.5% Center

10

0

0

1

1

66.8

33.4

±0.5% Center

10

0

1

0

0

90

30

±0.5% Center

10

0

1

0

1

112

37.3

±0.5% Center

10

0

1

1

0

95

31.67

±0.5% Center

10

0

1

1

1

100

33.3

±0.5% Center

10

1

0

0

0

120

40

±0.5% Center

10

1

0

0

1

115

38.3

±0.5% Center

10

1

0

1

0

110

36.67

±0.5% Center

10

1

0

1

1

105

35

±0.5% Center

10

1

1

0

0

140

35

±0.5% Center

10

1

1

0

1

150

37.5

±0.5% Center

10

1

1

1

0

124

31

±0.5% Center

10

1

1

1

1

133.3

33.3

±0.5% Center

Table 6. Select Function for Data Byte 3, Bits 0:1

Function

Input Conditions

Output Conditions

Data Byte 3

CPU0:1

PCI_F, PCI1:6

REF2X,

IOAPIC

48MHZ

24MHZ

Bit 1

Bit 0

Spread Spectrum OFF

0

0

Note 2

Note 2

14.318 MHz

48 MHz

24 MHz

Test Mode

0

1

X1/2

CPU/2, 3, or 4

X1

X1/2

X1/4

Spread Spectrum ON (default)

1

0

±0.5%

±0.5%

14.318 MHz

48 MHz

24 MHz

Three-state

1

1

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z