Pin Diagram

TLW12822 – 2

Pin Descriptions

Pin No

Pin Name

IO

Description

1

GND

Ground

2

OSC

IN

I

Reference Oscillator input A CMOS inverting gate input intended for connection to a crystal

driven from an external CMOS or TTL logic gate May also be used as a buffer for an externally

provided reference oscillator

Power supply voltage input to PLL

4

GND

Ground

O

VCO frequency output

6

GND

Ground

7

GND

Ground

Power supply voltage input to VCO

9

GND

Ground

10

GND

Ground

11

GND

Ground

12

GND

Ground

13

GND

Ground

14

CLK

I

High impedance CMOS Clock input Data is clocked in on the rising edge into the various

counters and registers

15

DATA

I

Binary serial data input Data entered MSB first LSB is control bit High impedance CMOS input

16

LE

I

Load enable input (with internal pull-up resistor) When LE transitions HIGH data stored in the

shift registers is loaded into the appropriate latch (control bit dependent) Clock must be low

when LE toggles high or low See serial diagram

17

LD

O

Lock detect Output provided to indicate when the VCO frequency is in ‘‘lock’’ When the loop is

locked the pin’s output is HIGH with narrow pulses

18

GND

Ground

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