LT6350 datasheet(16/28 Pages) AD

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LT6350

6350fc

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applicaTions inForMaTion

Driving the input signal sufficiently beyond the power

supply rails will cause the input transistors to saturate.

When saturation occurs, the amplifier loses a stage of

phase inversion and the output tries to invert. Diodes D1

and D2 (Figure 5) forward bias and hold the output within

a diode drop of the input signal. With very heavy input

overdrive the output of op amp 1 could invert. To avoid

this inversion, limit the input overdrive to 0.5V beyond

the power supply rails.

OUTPUT VOLTAGE RANGE

The outputs of the LT6350 typically swing to within 55mV

of the upper and lower supply rails when driving a purely

capacitive load such as at the switched-capacitor input

stage of a SAR ADC. The LT6350 can therefore share a

single 5V supply with the SAR ADC and drive a full 8VP-P

differentialaroundaninputcommonmodevoltagebetween

2.055V and 2.945V. A modest negative supply can be

added to allow the LT6350 to swing all the way to 0V in

systems where the ADC requires a true 0V-referenced

signal or when the input common mode range of the ADC

is restricted to be lower than 2.055V. Some SAR ADCs use

2V as the input common mode voltage with a full-scale

input signal range at each input of 0V to 4V. The outputs

of the LT6350 can swing 7.78VP-P differentially around a

2V common mode voltage, which is a loss of only 0.24dB

of the full-scale range of such ADCs.

+–

+IN1

–IN1

V+

V–

OUT2

OUT1

SHDN

+IN2

VIN

0.1µF

LT6350

6350 F06

CCM

RFILT

CDIFF

CCM

–

AIN+

AIN–

ADC

Figure 6. Driving an ADC

INTERFACING THE LT6350 TO A/D CONVERTERS

When driving an ADC, an additional single-pole passive

RC filter added between the outputs of the LT6350 and

the inputs of the ADC can sometimes improve system

performance.ThisisbecausethesamplingprocessofADCs

creates a charge transient at the ADC inputs that is caused

by the switching in of the ADC sampling capacitor. This

momentarily shorts the output of the amplifier as charge is

transferred between amplifier and sampling capacitor. For

anaccuraterepresentationoftheinputsignal,theamplifier

must recover and settle from this load transient before

the acquisition period has ended. An RC network at the

outputsofthedriverhelpsdecouplethesamplingtransient

of the ADC from the amplifier reducing the demands on

the amplifier’s output stage (see Figure 6). The resistors

at the inputs to the ADC minimize the sampling transients

that charge the RC filter capacitors.

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