AD9879 datasheet(19/32 Pages) AD

19 / 32 page

AD9879

Rev. A | Page 19 of 32

Bit 5: Tx Path Select Profile 1

The AD9879 quadrature digital upconverter is capable of

storing two preconfigured modulation modes called profiles.

Each profile defines a transmit frequency tuning word and cable

driver amplifier gain (DAC gain) setting. The profile select bit

or PROFILE pin programs the current register profile to be

used. The profile select bit should always be 0 if the PROFILE

pin is to be used to switch between profiles. Using the profile

select bit as a means of switching between different profiles

requires the PROFILE pin to be tied low.

REGISTERS 0x10–0x17—CARRIER FREQUENCY

TUNING

Tx Path Frequency Tuning Words

The frequency tuning word (FTW) determines the DDS-

generated carrier frequency (fC) and is formed via a

concatenation of register addresses.

The 26-bit FTW is spread over four register addresses. Bit 25 is

the MSB and Bit 0 is the LSB.

The carrier frequency equation is given as

fc = [FTW × fSYSCLK]/226

(12)

where:

fSYSCLK = M × fOSCIN.

FTW < 0 × 2000000.

Changes to FTW bytes take effect immediately.

Cable Driver Gain Control

The AD9879 has a 3-pin interface to the AD832x family of

programmable gain cable driver amplifiers. This allows direct

control of the cable driver’s gain through the AD9879.

In its default mode, the complete 8-bit register value is

transmitted over the 3-wire cable amplifier (CA) interface.

If Bit 3 of Register 0x0F is set high, Bits [7:4] determine the

8-bit word sent over the CA interface according to Table 7.

Table 7. Cable Driver Gain Control

Bits [7:4]

CA Interface Transmit Word

0000

0000 0000 (default)

0001

0000 0001

...

0111

0100 0000

1000

1000 0000

In this mode, the lower bits determine the fine gain setting of

the DAC output.

Table 8. DAC Output Fine Gain Setting

Bits [3:0]

DAC Fine Gain

0000

0.0 dB (default)

0001

0.5 dB

...

1110

7.0 dB

1111

7.5 dB

New data is automatically sent over the 3-wire CA interface

(and DAC gain adjust) whenever the value of the active gain

control register changes or a new profile is selected. The default

value is 0x00 (lowest gain).

The formula for the combined output level calculation of the

AD9879 fine gain and AD8327 or AD8322 coarse gain is

V8327 = V9879(0) + (fine)/2 + 6(coarse) − 19

(13)

V8322 = V9879(0) + (fine)/2 + 6(coarse) − 14

(14)

where:

fine is the decimal value of Bits [3:0].

coarse is the decimal value of Bits [7:8].

V9879(0) is level at AD9879 output in dBmV for fine = 0.

V8327 is level at output of AD8327 in dBmV.

V8322 is level at output of AD8322 in dBmV.

AD9879 Datasheet(PDF) 19 Page - Analog Devices

AD9879 Datasheet(HTML) 19 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL