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GD32H757VMT7 Datasheet(PDF) 88 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD32H757VMT7 Datasheet(HTML) 88 Page - GigaDevice Semiconductor (Beijing) Inc. |
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88 / 151 page ![]() GD32H757xx Datasheet 87 Figure 4-2. Recommended power supply decoupling capacitors(1)(2)(3) 100 nF VBAT VSS N * VDD VSS 4.7 μF + N * 100 nF 10 nF VDDA VSSA 1 μF 10 nF VREFP VREFN 1 μF VSS VCORE 2x2.2 μF or 2x100nF (1) The VREFP and VREFN pins are only available on no less than 100-pin packages, or else the VREFP and VREFN pins are not available and internally connected to VDDA and VSSA pins. (2) All decoupling capacitors need to be as close as possible to the pins on the PCB board. (3) When voltage regulator is enabled the two 2.2 μF Vcore capacitors are required , if bypassing the voltage regulator ,two 100 nF decoupling capacitors are required. Table 4-4. Vcore operating conditions(1)(2)(3) Symbol Parameter Conditions CEXT Capacitance of external capacitor 2.2 μF ESR ESR of external capacitor < 100 mΩ (1) When bypassing the voltage regulator, the two 2.2 μF V CORE capacitors are not required and should be replaced by two 100 nF decoupling capacitors. (2) This value corresponds to CEXT typical value. A variation of +/-20% is tolerated. (3) If a third VCORE pin is available on the package, it must be connected to the other VCORE pins but no additional capacitor is required. Table 4-5. Clock frequency(1)(2) Symbol Parameter Conditions Min Max Unit fCPU core clock frequency Supply voltage < 3.6V — 600 MHz Supply voltage < 2.3V — 400 fAHB AHB clock frequency Supply voltage < 3.6V — 300 Supply voltage < 2.3V — 200 |
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