| Electronic Components Datasheet Search |
|
GD32H757VMT7 Datasheet(PDF) 135 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
|
|||||||||||||||||||||||||||||
GD32H757VMT7 Datasheet(HTML) 135 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
135 / 151 page ![]() GD32H757xx Datasheet 134 Symbol Parameter Min Max Unit Th(AD_NADV) EXMC_AD(adress) valid hold time after EXMC_NADV high Tfclk-1 Tfclk+1 ns (1) CL = 30 pF. (2) Value guaranteed by design, not 100% tested in production. Table 4-74. Asynchronous multiplexed PSRAM / NOR write timings(1)(2) Symbol Parameter Min Max Unit tw(NE) EXMC_NE low time 5*Tfclk-1 5*Tfclk+1 ns tV(NWE_NE) EXMC_NEx low to EXMC_NWE low Tfclk-1 — ns tw(NWE) EXMC_NWE low time 3*Tfclk-1 3*Tfclk+1 ns th(NE_NWE) EXMC_NWE high to EXMC_NE high hold time Tfclk-1 — ns tv(A_NE) EXMC_NEx low to EXMC_A valid 0 — ns tV(NADV_NE) EXMC_NEx low to EXMC_NADV low 0 — ns tw(NADV) EXMC_NADV low time Tfclk-1 Tfclk+1 ns th(AD_NADV) EXMC_AD(address) valid hold time after EXMC_NADV high Tfclk-1 — ns th(A_NWE) Address hold time after EXMC_NWE high Tfclk-1 — ns th(BL_NWE) EXMC_BL hold time after EXMC_NWE high Tfclk-1 — ns tv(BL_NE) EXMC_NEx low to EXMC_BL valid 0 — ns tv(DATA_NADV) EXMC_NADV high to DATA valid Tfclk-1 — ns th(DATA_NWE) Data hold time after EXMC_NWE high Tfclk-1 — ns (1) CL = 30 pF. (2) Value guaranteed by design, not 100% tested in production. Table 4-75. Synchronous multiplexed PSRAM / NOR read timings(1)(2) Symbol Parameter Min Max Unit tw(CLK) EXMC_CLK period Texmc_clk — ns td(CLKL-NExL) EXMC_CLK low to EXMC_NEx low 0 — ns td(CLKH-NExH) EXMC_CLK high to EXMC_NEx high 2*Tfclk-1 — ns td(CLKL-NADVL) EXMC_CLK low to EXMC_NADV low 0 — ns td(CLKL-NADVH) EXMC_CLK low to EXMC_NADV high 0 — ns td(CLKL-AV) EXMC_CLK low to EXMC_Ax valid 0 — ns td(CLKH-AIV) EXMC_CLK high to EXMC_Ax invalid 2*Tfclk-1 — ns td(CLKL-NOEL) EXMC_CLK low to EXMC_NOE low 0 — ns td(CLKH-NOEH) EXMC_CLK high to EXMC_NOE high 2*Tfclk-1 — ns td(CLKL-ADV) EXMC_CLK low to EXMC_AD valid 0 — ns td(CLKL-ADIV) EXMC_CLK low to EXMC_AD invalid 0 — ns (1) CL = 30 pF. (2) Value guaranteed by design, not 100% tested in production. Table 4-76. Synchronous multiplexed PSRAM write timings(1)(2) Symbol Parameter Min Max Unit tw(CLK) EXMC_CLK period Texmc_clk — ns td(CLKL-NExL) EXMC_CLK low to EXMC_NEx low 0 — ns |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |