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CY7C4255
CY7C4265
Document #: 38-06004 Rev. *C
Page 11 of 22
Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW))
Programmable Almost Full Flag Timing
Notes:
21. PAE offset
− n.
22. tSKEW3 is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of
WCLK and the rising RCLK is less than tSKEW3, then PAE may not change state until the next RCLK.
23. If a read is preformed on this rising edge of the read clock, there will be Empty + (n
−1) words in the FIFO when PAE goes LOW.
24. PAF offset = m. Number of data words written into FIFO already = 8192
− (m + 1) for the CY7C4255 and 16384 − (m + 1) for the CY7C4265.
25. PAF is offset = m.
26. 8192
− m words in CY7C4255 and 16384 – m words in CY7C4265.
27. 8192
− (m + 1) words in CY7C4255 and 16384 – (m + 1) CY7C4265.
Switching Waveforms (continued)
Note
tENH
WCLK
PAE
RCLK
tCLKH
tENS
tCLKL
tENS
tPAE synch
N + 1 WORDS
INFIFO
tENH
tENS
tENH
tENS
tPAE synch
REN
WEN
WEN2
tSKEW3
Note
[22]
21
23
Note
tENH
WEN
WCLK
PAF
REN
RCLK
tCLKH
tPAF
tENS
tCLKL
tENS
tPAF
FULL– M WORDS
INFIFO
FULL– (M+1) WORDS
IN FIFO
[27]
[26]
24
[25]
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