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CY7C4201 Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY7C4201
Description  64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs
PDF  19 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C4201 Datasheet(HTML) 8 Page - Cypress Semiconductor

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CY7C4421/4201/4211/4221
CY7C4231/4241/4251
Document #: 38-06016 Rev. *C
Page 8 of 19
AC Test Loads and Waveforms[11, 12]
3.0V
5V
OUTPUT
R1 1.1 K
Ω
R2
680
Ω
CL
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
≤ 3ns
≤ 3 ns
OUTPUT
1.91V
Equivalent to:
THÉVENIN EQUIVALENT
420
Ω
ALL INPUT PULSES
Switching Characteristics Over the Operating Range
Parameter
Description
-10
-15
-25
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tS
Clock Cycle Frequency
100
66.7
40
MHz
tA
Data Access Time
2
8
2
10
2
15
ns
tCLK
Clock Cycle Time
10
15
25
ns
tCLKH
Clock HIGH Time
4.5
6
10
ns
tCLKL
Clock LOW Time
4.5
6
10
ns
tDS
Data Set-up Time
3
4
6
ns
tDH
Data Hold Time
0.5
1
1
ns
tENS
Enable Set-up Time
3
4
6
ns
tENH
Enable Hold Time
0.5
1
1
ns
tRS
Reset Pulse Width[13]
10
15
25
ns
tRSS
Reset Set-up Time
8
10
15
ns
tRSR
Reset Recovery Time
8
10
15
ns
tRSF
Reset to Flag and Output Time
10
15
25
ns
tOLZ
Output Enable to Output in Low-Z[14]
0
0
0
ns
tOE
Output Enable to Output Valid
3
7
3
8
3
12
ns
tOHZ
Output Enable to Output in High-Z[14]
3
7
3
8
3
12
ns
tWFF
Write Clock to Full Flag
8
10
15
ns
tREF
Read Clock to Empty Flag
8
10
15
ns
tPAF
Clock to Programmable Almost-Full Flag
8
10
15
ns
tPAE
Clock to Programmable Almost-Full Flag
8
10
15
ns
tSKEW1
Skew Time between Read Clock and Write Clock
for Empty Flag and Full Flag
5
6
10
ns
tSKEW2
Skew Time between Read Clock and Write Clock
for Almost-Empty Flag and Almost-Full Flag
10
15
18
ns
Notes:
11. CL = 30 pF for all AC parameters except for tOHZ.
12. CL = 5 pF for tOHZ.
13. Pulse widths less than minimum values are not allowed.
14. Values guaranteed by design, not currently tested.



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