AD4692 datasheet(32/81 Pages) AD

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Data Sheet

AD4691/AD4692

THEORY OF OPERATION

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Rev. 0 | 32 of 81

TA output can be read via the AVG_IN0 through AVG_IN15 or

AVG_STS_IN0 through AVG_STS_IN15 registers (see the Averag-

ing Filter Readback section).

Note that because the division block performs right-shift operations

instead of arithmetic division, the averaging filter only divides by

powers-of-2. When ACC_COUNT is a power-of-2, the LSB size of

the 16-bit AVG_DATA data is equal to the LSB size of the 16-bit

ADC core (as described in the Transfer Function section). When

ACC_COUNT is not a power-of-2, the running sum is divided by a

larger divisor than a true mean calculation would use, resulting in

a smaller effective LSB size and a loss in resolution. When reading

from AVG_DATA, it is therefore recommended to set the accumula-

tor depth to a power-of-2. Otherwise, it is recommended to read the

ACC_DATA value instead (and optionally perform divide-by-depth in

the digital host).

Table 13. Averaging Filter Right-Shift Operations vs. ACC_COUNT

ACC_COUNT

Right-Shifts

Effective Divisor

3, 4

5 to 8

9 to 16

17 to 32

33 to 64

Averaging Filter Readback

The AD4691/AD4692 include the following four sets of registers for

reading data (and optional status) from the averaging filters:

►

AVG_IN0 through AVG_IN15 contain the 16-bit averaged data

from each channel

►

AVG_STS_IN0 through AVG_STS_IN15 contain the 16-bit aver-

aged data plus eight bits of status from each channel

►

ACC_IN0 through ACC_IN15 contain the 24-bit accumulator

output from each channel

►

ACC_STS_IN0 through ACC_STS_IN15 contain the 24-bit accu-

mulator output plus eight bits of status from each channel

Table 14 through Table 17 summarize the names, addresses, and

contents of the four readback register sets. The Bulk Reading

ADC Data Registers section provides recommendations for reading

multiple (or all) channels' registers in a single SPI frame for efficient

data transfer to the digital host.

Figure 101 shows a flowchart for selecting between the different

readback register sets.

Table 14. Averaging Filter Data Registers (AVG_INx)

AVG_IN0

0x0200

AVG_DATA[7:0]

0x0201

AVG_DATA[15:8]

AVG_IN1

0x0202

AVG_DATA[7:0]

0x0203

AVG_DATA[15:8]

...

AVG_IN15

0x021E

AVG_DATA[7:0]

0x021F

AVG_DATA[15:8]

Table 15. Averaging Filter Data Plus Status Registers (AVG_STS_INx)

AVG_STS_IN0

0x0220

ACC_ERR,

ACC_COUNT[6:0]

0x0221

AVG_DATA[7:0]

0x0222

AVG_DATA[15:8]

...

AVG_STS_IN15

0x024D

ACC_ERR,

ACC_COUNT[6:0]

0x024E

AVG_DATA[7:0]

0x024F

AVG_DATA[15:8]

Table 16. Accumulator Data Registers (ACC_INx)

ACC_IN0

0x0250

ACC_DATA[7:0]

0x0251

ACC_DATA[15:8]

0x0252

ACC_DATA[23:16]

...

ACC_IN15

0x027D

ACC_DATA[7:0]

0x027E

ACC_DATA[15:8]

0x027F

ACC_DATA[23:16]

Table 17. Accumulator Data Plus Status Registers (ACC_STS_INx)

ACC_STS_IN0

0x0280

ACC_ERR,

ACC_COUNT[6:0]

0x0281

ACC_DATA[7:0]

0x0282

ACC_DATA[15:8]

0x0283

ACC_DATA[23:16]

...

ACC_STS_IN15

0x02BC

ACC_ERR,

ACC_COUNT[6:0]

0x02BD

ACC_DATA[7:0]

0x02BE

ACC_DATA[15:8]

0x02BF

ACC_DATA[23:16]

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