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ISO7760FDWR Datasheet(PDF) 9 Page - Texas Instruments

Part # ISO7760FDWR
Description  ISO776x High-speed, robust EMC, reinforced six-channel digital isolators
PDF  52 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ISO7760FDWR Datasheet(HTML) 9 Page - Texas Instruments

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5.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
DW-16 DBQ-16
CLR
External clearance(1)
Shortest terminal-to-terminal distance through air
>8
>3.7
mm
CPG
External creepage(1)
Shortest terminal-to-terminal distance across the package
surface
>8
>3.7
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
>17
>17
μm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A
>600
>600
V
Material group
According to IEC 60664-1
I
I
Overvoltage category per IEC 60664-1
Rated mains voltage ≤ 150 VRMS
I-IV
I-IV
Rated mains voltage ≤ 300 VRMS
I-IV
I-III
Rated mains voltage ≤ 600 VRMS
I-IV
n/a
Rated mains voltage ≤ 1000 VRMS
I-III
n/a
DIN EN IEC 60747-17 (VDE 0884-17)(2)
VIORM
Maximum repetitive peak isolation
voltage
AC voltage (bipolar)
2121
566
VPK
VIOWM Maximum working isolation voltage
AC voltage; Time dependent dielectric breakdown (TDDB)
test; See Figure 8-7
1500
400
VRMS
DC voltage
2121
566
VDC
VIOTM Maximum transient isolation voltage
VTEST = VIOTM,
t = 60 s (qualification);
VTEST = 1.2 x VIOTM,
t= 1 s (100% production)
ISO7760
8000
4242
VPK
ISO7761,
ISO7762,
ISO7763
7071
VIMP
Maximum impulse voltage(3)
Tested in air, 1.2/50-μs waveform per IEC 62368-1
8000
4000
VPK
VIOSM Maximum surge isolation voltage(4)
VIOSM ≥ 1.3 x VIMP; Tested in oil (qualification test),
1.2/50-μs waveform per IEC 62368-1
12800 10000
VPK
qpd
Apparent charge(5)
Method a, After Input-output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 x VIORM, tm = 10 s
≤5
≤5
pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.6 x VIORM, tm = 10 s
≤5
≤5
Method b: At routine test (100% production) and
preconditioning (type test);
Vini = 1.2 x VIOTM, tini = 1 s;
Vpd(m) = 1.875 x VIORM, tm = 1 s (method b1) or
Vpd(m) = Vini, tm = tini (method b2)
≤5
≤5
CIO
Barrier capacitance, input to output(6)
VIO = 0.4 x sin (2πft), f = 1 MHz
~1.1
~0.9
pF
RIO
Isolation resistance(6)
VIO = 500 V, TA = 25°C
>1012
>1012
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
>1011
>1011
VIO = 500 V, TS = 150°C
>109
>109
Pollution degree
2
2
Climatic category
55/125/
21
55/125/
21
UL 1577
VISO
Maximum withstanding isolation voltage
VTEST = VISO , t = 60 s (qualification),
VTEST = 1.2 x VISO , t = 1 s (100% production)
5000
3000
VRMS
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.
Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become
equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these
specifications.
www.ti.com
ISO7760, ISO7761, ISO7762, ISO7763
SLLSER1H – AUGUST 2017 – REVISED JANUARY 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: ISO7760 ISO7761 ISO7762 ISO7763



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