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UP9512 Datasheet(PDF) 2 Page - uPI Group Inc. |
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UP9512 Datasheet(HTML) 2 Page - uPI Group Inc. |
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2 / 31 page  uP9512 2 uP9512-DS-F0001, Dec. 2018 www.upi-semi.com Typical Application Circuit EAP DAC 5VCC IMON FBRTN COMP FB CSNSUM VOUT_SNS 5V LPC ADDR / FSW SDA VID REFADJ REFIN VREF FBRTN 1.8V PSI GPIO EN VINMON VIN PGOOD PWMx GND VGND_SNS VOUT GND PVCC PWM TOUT PHASE CSPx 5V VOUT VIN Repeat to 8 91k 10k CH_OC REFOUT SW VOUT 5V RSUM From uP9512's EN TSENSE SCL DrMOS Note : Reserved for Phase Disable Note : Reserved for REFOUT sink Note : PWM strap setting 1 2 3 4~11 33 13~20 23 21 30 31 32 28 29 25 41 39 40 37 38 35 34 26 24 12 36 27 CSPSUM 5VCC VCC Note : Depends on the impedance of DrMOS's EN, additional circuit may be required. 5VCC Note to PWM strap setting function: Make sure the PWM input impedance of DrMOS is in high impedance state when DrMOS is disabled if uP9512 PWM strap setting function is used. If the PWM pin input impedance of DrMOS is not in high impedance state when it is disabled, please disable the PWM strap setting function. |
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