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UP9512 Datasheet(PDF) 13 Page - uPI Group Inc. |
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UP9512 Datasheet(HTML) 13 Page - uPI Group Inc. |
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13 / 31 page ![]() uP9512 13 uP9512-DS-F0001, Dec. 2018 www.upi-semi.com Functional Description Channel Current Limit (CH_OC) The uP9512 adopts channel peak current limit function to avoid catastrophic damage to power stage components. The uP9512 monitors the sensed current (in the form of voltage) from DrMOS. If the sensed voltage of any phase exceeds the channel current limit threshold, the channel current limit function activates. The resistor R CH_OC connected between CH_OC pin and GND determines the channel current limit threshold. The channel current limit threshold can be calculated as: CS OC CH PEAK OUT G uA R I × × = 6 20 _ ) ( Where I OUT(PEAK) is the per-phase inductor peak current, R CH_OC is the resistor connected between CH_OC pin and GND. The R CH_OC must be at least 10kΩ. GCS (mV/A) is the current sense gain of DrMOS. Once the per-phase current exceeds the setting threshold, the per-phase output inductor current is limited to an average current. A continuous over load event will cause the output voltage drop and eventually trigger under voltage protection and shuts down the uP9512. Total Output Current Protection ISUM IMON RIMON 2.1V CMP Total OCP CIMON Figure 12. Total Output Current Protection The uP9512 provides total OCP as shown in Figure 12. A resistor R IMON is connected from IMON pin to GND. Adding a capacitor to the IMON pin can adjust the IMON response time. The sensed current I SUM is mirrored internally and fed to IMON pin. This current flows through the resistor R IMON creating voltage across it. As the total load current increases, the voltage on IMON pin (V IMON) increases proportionally. When the IMON pin voltage is greater than 2.1V, the total OCP will be triggered. The total OCP level (2.1V) is usually designed for the voltage regulator that is operated in full phase condition by hardware setting. The actual operating phase number is controlled by the PSI signal or the SMBus Auto Phase setting. When the operating phase number is decreased, the total OCP level is decreased as well. The total OCP level is changed per actual operating phase number. Table 7 shows the relationship between total OCP ratio per actual operating phase number and the hardware configuration. Once the total OCP is triggered. The uP9512 will turn off both high-side and low-side MOSFETs of all channels. The total OCP function is a latch-off function and only EN restart or 5VCC re-POR can release the latch. o i t a R P C O t u p t u O l a t o T n o i t i d n o C g n i t a r e p O e s a h p - 8e s a h p - 7e s a h p - 6e s a h p - 5e s a h p - 4e s a h p - 3e s a h p - 2e s a h p - 1 e r a w d r a H n o i t a r u g i f n o C e s a h p - 81 8 / 74 / 38 / 52 / 18 / 36 1 / 58 / 2 e s a h p - 7- -1 8 / 74 / 38 / 52 / 18 / 36 1 / 5 e s a h p - 6- -- -1 4 / 38 / 52 / 18 / 36 1 / 5 e s a h p - 5- -- -- -1 4 / 38 / 52 / 18 / 3 e s a h p - 4- -- -- -- -1 4 / 32 / 18 / 3 e s a h p - 3- -- -- -- -- -1 4 / 32 / 1 e s a h p - 2- -- -- -- -- -- -1 4 / 3 e s a h p - 1- -- -- -- -- -- -- -1 Table 7. Total OCP and Operating Phase Number |
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