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RFM67W Datasheet(PDF) 13 Page - Shenzhen Hope Microelectronics Co., Ltd. |
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RFM67W Datasheet(HTML) 13 Page - Shenzhen Hope Microelectronics Co., Ltd. |
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13 / 37 page ![]() Page 13 RFM 67W Tel: + 86-755-82973805 Fax: + 86-755-82973550 E-mail: sales@hoperf.com http:/ / www.hoperf.com Table 7 Example Standard Bitrates and their Corresponding Register Settings. Type BrMSB BrLSB (G)FSK, (G)MSK OOK Rb Actual (to 7s.f.) 0x68 0x2B 1.2 kbps 1.2 kbps 1200.015 0x34 0x15 2.4 kbps 2.4 kbps 2400.060 0x1A 0x0B 4.8 kbps 4.8 kbps 4799.760 0x0D 0x05 9.6 kbps 9.6 kbps 9600.960 0x06 0x83 19.2 kbps 19.2 kbps 19196.16 0x03 0x41 38.4 kbps 38415.36 0x01 0xA1 76.8 kbps 76738.60 Classical modem baud rates (multiples of 1.2 kbps) 0x00 0xD0 153.6 kbps 153846.1 0x02 0x2C 57.6 kbps 57553.95 Classical modem baud rates (multiples of 0.9 kbps) 0x01 0x16 115.2 kbps 115107.9 0x0A 0x00 12.5 kbps 12.5 kbps 12500.00 0x05 0x00 25 kbps 25 kbps 25000.00 0x80 0x00 50 kbps 50000.00 0x01 0x40 100 kbps 100000.0 0x00 0xD5 150 kbps 150234.7 0x00 0xA0 200 kbps 200000.0 0x00 0x80 250 kbps 250000.0 Round bit rates (multiples of 12.5, 25 and 50 kbps) 0x00 0x6B 300 kbps 299065.4 Watch Xtal frequency 0x03 0xD1 32.768 kbps 32.768 kbps 32753.32 5.2. Synthesizer The frequency synthesizer of the RFM67W is a fully integrated fractional-N third-order sigma-delta phase-locked loop and VCO. Also incorporated are fully integrated third-order and low pass filters which determine the loop bandwidth. All of these features are fully automated and derived from the user bitrate and frequency deviation settings, as described in Sections 5.1.1 to 5.1.3. To ensure the frequency accuracy of the PLL output it is necessary to perform calibration. The calibration process is performed automatically upon power up of the RFM67W. However, the calibration feature is also accessible to the user via the SPI configuration register, PllStat (address 0x0A). The calibration is performed by setting bit 2 (pll_cal) high. This ensures that the frequency output accuracy is limited only by the frequency error of the crystal oscillator, the calibration procedure lasts 500 µs, during which time pll_cal_done (bit 4 of address 0x0A) is set low. Once complete pll_cal_done is set high and confirmation of a successful calibration can be obtained by reading pll_cal_ok. |
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