M50FW002 datasheet(17/39 Pages) STMICROELECTRONICS

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M50FW002

FIRMWARE HUB (FWH) INTERFACE CONFIGURATION REGISTERS

When the Firmware Hub Interface is selected sev-

eral additional registers can be accessed. These

registers control the protection status of the

Blocks, read the General Purpose Input pins and

identify the memory using the Electronic Signature

codes. See Table 11 for the memory map of the

Configuration Registers.

Lock Registers

The Lock Registers control the protection status of

the Blocks. Each Block has its own Lock Register.

Three bits within each Lock Register control the

protection of each block, the Write Lock Bit, the

Read Lock Bit and the Lock Down Bit.

The Lock Registers can be read and written,

though care should be taken when writing as, once

the Lock Down Bit is set, ‘1’, further modifications

to the Lock Register cannot be made until cleared,

to ‘0’, by a reset or power-up.

See Table 12 for details on the bit definitions of the

Lock Registers.

Write Lock. The

Write

Lock

Bit

determines

whether the contents of the Block can be modified

(using the Program or Erase Command). When

the Write Lock Bit is set, ‘1’, the block is write pro-

tected; any operations that attempt to change the

data in the block will fail and the Status Register

will report the error. When the Write Lock Bit is re-

set, ‘0’, the block is not write protected through the

Lock Register and may be modified unless write

protected through some other means.

When VPP is less than VPPLK all blocks are pro-

tected and cannot be modified, regardless of the

state of the Write Lock Bit. If Top Block Lock, TBL,

is Low, VIL, then the Top Block (Block 6) is write

protected and cannot be modified. Similarly, if

Write Protect, WP, is Low, VIL, then the blocks 0 to

5 are write protected and cannot be modified.

After power-up or reset the Write Lock Bit is al-

ways set to ‘1’ (write protected).

Read Lock. The

Read

Lock

bit

determines

whether the contents of the Block can be read

(from Read mode). When the Read Lock Bit is set,

‘1’, the block is read protected; any operation that

attempts to read the contents of the block will read

00h instead. When the Read Lock Bit is reset, ‘0’,

read operations in the Block return the data pro-

grammed into the block as expected.

After power-up or reset the Read Lock Bit is al-

ways reset to ‘0’ (not read protected).

Lock Down. The Lock Down Bit provides a

mechanism for protecting software data from sim-

ple hacking and malicious attack. When the Lock

Down Bit is set, ‘1’, further modification to the

Write Lock, Read Lock and Lock Down Bits cannot

be performed. A reset or power-up is required be-

fore changes to these bits can be made. When the

Lock Down Bit is reset, ‘0’, the Write Lock, Read

Lock and Lock Down Bits can be changed.

Firmware Hub (FWH) General Purpose Input

The Firmware Hub (FWH) General Purpose Input

face General Purpose Input pins, FGPI0-FGPI4.

When this register is read, the state of these pins

is returned. This register is read-only and writing to

it has no effect.

The signals on the Firmware Hub Interface Gener-

al Purpose Input pins should remain constant

throughout the whole Bus Read cycle in order to

guarantee that the correct data is read.

Manufacturer Code Register

Reading the Manufacturer Code Register returns

the manufacturer code for the memory. The man-

ufacturer code for STMicroelectronics is 20h. This

Device Code Register

Reading the Device Code Register returns the de-

vice code for the memory (29h). This register is

read-only and writing to it has no effect.

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