5 Specifications

5.1 Absolute Maximum Ratings

over operating temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

Input voltage, VIN (legacy chip)

35

V

Input voltage, VIN (new chip)

45

V

Operating junction temperature, TJ (legacy

chip)

LM78LxxACZ (TO-92)

0

125

°C

LM78LxxACM (SOIC)

0

125

LM78LxxAIM (SOIC)

-40

125

LM78LxxITP (thin DSBGA)

-40

85

Operating junction temperature, TJ (new chip)

-40

150

°C

Storage temperature, Tstg (legacy and new chip)

–65

150

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

5.2 ESD Ratings

VALUE (Legacy Chip)

VALUE (New Chip)

UNIT

V(ESD

)

Electrostatic

discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

pins(1)

±1000

±2000

V

Charged device model (CDM), per JEDEC specification JESD22-

C101, all pins(2)

-

±1000

(1)

JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

5.3 Thermal Information

THERMAL METRIC(1)

LM78Lxx

UNIT

D (SOIC) -

New Chip

D (SOIC) -

Legacy Chip

PK (SOT-89)

LP (TO-92)

YPB

(DSBGA)

8 PINS

8 PINS

3 PINS

3 PINS

8 PINS

RθJA

Junction-to-ambient thermal resistance

115

128.8

54.7

158.7

108.4

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

60.3

76

88.1

75.2

1.3

°C/W

RθJB

Junction-to-board thermal resistance

55.6

69.3

9.6

—

31.4

°C/W

ψJT

Junction-to-top characterization parameter

16.2

26.3

6.2

30.2

4.5

°C/W

ψJB

Junction-to-board characterization parameter

55

68.8

9.7

138.2

31.4

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

—

—

7.7

—

—

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

note.

5.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

MIN

TYP

MAX

UNIT

VIN

Input voltage (legacy chip)

30

V

Input voltage (new chip)

5.1

30

IO

Continuous output current

100

mA

CIN (2)

Input capacitor (3) (new chip only)

0.33

µF

COUT (2)

Output capacitor (4) (new chip only)

0.1

LM78L

SNVS754N – JANUARY 2000 – REVISED APRIL 2026

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