854054AG

www.icst.com/products/hiperclocks.html

REV. A MARCH 29, 2006

9

Integrated

Circuit

Systems, Inc.

ICS854054

4:1

A general LVDS interface is shown in Figure 3. In a 100

Ω

differential transmission line environment, LVDS drivers re-

quire a matched load termination of 100

Ω across near the

100 Ohm Differiential Transmission Line

R1

100

3.3V

+

-

LVDS_Driv er

3.3V

receiver input. For a multiple LVDS outputs buffer, if only par-

tial outputs are used, it is recommended to terminate the un-

used outputs.