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SED1565DBB Datasheet(PDF) 42 Page - Epson Company |
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SED1565DBB Datasheet(HTML) 42 Page - Epson Company |
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42 / 54 page ![]() S1D15300 Series 5–30 EPSON Rev.1.4 • Dynamic current consumption (2) when the LCD built-in power circuit lamp is ON Condition: Remarks: V13 200 150 100 50 0 1 234567 (uA) IDD (1) VDD (V) The built-in power circuit is ON. S1D15300/S1D15305: V5-VDD=–8.0 V, triple boosting S1D15301: V5-VDD=–11.0 V, quadruple boosting S1D15302: V5-VDD=–11.0 V, quadruple boosting S1D15303: V5-VDD=–5.0 V, dual boosting S1D15304: V5-VDD=–5.0 V, dual boosting Ta=25 °C S1D15301, S1D15302 S1D15300/S1D15305 S1D15303, S1D15304 *1 Though the wide range of operating voltages is guaranteed, a spike voltage change may affect the voltage assurance during access from the microprocessor. *2 VDD and V5 operating voltage range. (Refer to Fig. 10.) The operating voltage range applies if an external power supply is used. *3 A0, D0 - D5, D6, D7 (SI), RD (E), WR (R/W), CS1, CS2, FR, M/S, C86, P/S and DOF pins *4 CL, SCL (D6) and RES pins *5 D0 - D5, D6, D7 (SI), FR, FRS, DYO, DOF and CL pins *6 A0, RD (E), WR (R/W), CS1, CS2, M/S, RES, C86 and P/S pins *7 Applies when the D0 - D7, FR, CL, DYO and DOF pins are in high impedance, *8 Resistance value when 0.1 V is applied between the output pin SEGn or COMn and each power supply pin (V1, V2, V3, V4). This is specified in the operating voltage (2) range. R ON = 0.1 V/ ∆I (∆I: Current flowing when 0.1 V is applied in the ON status.) *9 For the relationship between oscillation frequency and frame frequency, refer to Fig. 9. *10 For triple or quadruple boosting using the on-chip power useing the primary-side power supply VDD must be used within the input voltage range. *11 The voltage regulator adjusts V5 within the voltage follower operating voltage range. *12, *13 Current that each IC unit consumes. It does not include the current of the LCD panel capacity, wiring capacity, etc. This is current consumption under the conditions of display data = checker, display ON, S1D15300 = 1/33 duty (1/6 Bias), and S1D15301 and S1D15302 = 1/65 duty. (1/8 Bias) *12 Applies to the case where the on-chip oscillator circuit is used and no access is made from the microprocessor. *13 Applies to the case where the on-chip oscillator circuit and the on-chip power circuit are used and no access is made from the microprocessor. The current flowing through voltage regulation resistors (R1, R2 and R3) is not included. The current consumption, when the on-chip voltage booster is used, is for the power supply VDD. • Relationship between oscillation frequency and frame frequency The relationship between oscillation frequency fOSC and LCD frame frequency, fF can be obtained by the following expression. (fF does not indicate the FR signal cycle but the AC cycle.) Fig. 9 Relationship between clock (fCL) and frame frequency fF Duty f CL f F S1D15300 1/33 f OSC/8 f OSC/(8*33) S1D15301 1/65 f OSC/4 f OSC/(4*65) S1D15302 S1D15303 1/17 f OSC/8 f OSC/(8*17) S1D15304 1/9 f OSC/8 f OSC/(8*9) S1D15305 1/35 f OSC/8 f OSC/(8*35) |
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