RT6200 datasheet(11/12 Pages) RICHTEK

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RT6200

DS6200-04

August 2015

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Layout Consideration

Follow the PCB layout guidelines for optimal performance

of RT6200.



Keep the traces of the main current paths as short and

wide as possible.



Put the input capacitor as close as possible to the device

pins (VIN and GND).



PHASE node is with high frequency voltage swing and

should be kept at small area. Keep sensitive

components away from the PHASE node to prevent

stray capacitive noise pick-up.



Place the feedback components to the FB pin as close

as possible.



Connect GND to a ground plane for noise reduction and

thermal dissipation.

Figure 4. PCB Layout Guide

Thermal Considerations

For continuous operation, do not exceed the maximum

operation junction temperature 125

°C. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

where TJ(MAX) is the maximum operation junction

temperature, TA is the ambient temperature and the

θJA is

the junction to ambient thermal resistance.

For recommended operating conditions specifications, the

maximum junction temperature of the die is 125

°C. The

junction to ambient thermal resistance

θJA is layout

dependent. For SOT-23-6 package, the thermal resistance

θJA is 208.2°C/W on standard JEDEC 51-7 four-layers

thermal test board. The maximum power dissipation at TA

= 25

°C can be calculated by following formula :

PD(MAX) = (125

°C − 25°C) / (208.2°C/W) = 0.48W for

SOT-23-6 packages

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance

θJA. The derating curves in Figure 3 allows

the designer to see the effect of rising ambient temperature

on the maximum power dissipation.

Figure 3. Derating Curves of Maximum Power

Dissipation

BOOT

GND

VIN

PHASE

VOUT

COUT

CIN

GND

0.0

0.2

0.4

0.6

0.8

1.0

100

125

Ambient Temperature (°C)

Four-Layer PCB

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