LAN9312 datasheet(334/458 Pages) SMSC

Part #	LAN9312

Description	High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

PDF	458 Pages

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Manufacturer	SMSC [SMSC Corporation]

Direct Link	http://www.smsc.com

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.2 (04-08-08)

334

SMSC LAN9312

DATASHEET

14.5.2.12

Port x MAC Receive CRC Error Count Register (MAC_RX_CRCERR_CNT_x)

This register provides a counter of received packets that with CRC errors. The counter is cleared upon

being read.

Port0: 0419h

Size:

32 bits

Port1: 0819h

Port2: 0C19h

BITS

DESCRIPTION

TYPE

DEFAULT

31:0

RX CRC

Count of packets that have between 64 and the maximum allowable number

of bytes and have a bad FCS, but do not have an extra nibble. The max

number of bytes is 1518 for untagged packets and 1522 for tagged packets.

If Jumbo2K (bit 3) is set in the Port x MAC Receive Configuration Register

(MAC_RX_CFG_x), the max number of bytes is 2048.

Note:

This counter will stop at its maximum value of FFFF_FFFFh.

Minimum rollover time at 100Mbps is approximately 137 hours.

00000000h

LAN9312 Datasheet(PDF) 334 Page - SMSC Corporation