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C2473 Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

Part # C2473
Description  RDFC Controllers for Offline Applications
PDF  18 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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C2472, C2473 and C2474
Datasheet
RDFC Controllers for Offline Applications
Product data
Page 8 of 18
DS-1423-0709C
© Cambridge Semiconductor Ltd 2007
26-Sep-2007
Resonance Control
The natural resonance of the transformer and associated components is deduced from the current flowing
into and out of the COL pin via the collector coupling capacitor.
The voltage sensed on the COL pin is used to control saturation of the primary switch transistor (Q1 in
Figure 3) during the on-period (see “Optimised Base Drive”). During the off-period, timing of the resonance is
detected via the current in and out of the pin, which has a low impedance path to GND during this time. Rate
of change of voltage at the transformer primary causes current into or out of the COL pin, which is processed
to measure the resonance period TRES and to find the optimum turn-on time for the following conversion
cycle. The resonant period is also used to determine the maximum on-time of the primary switch transistor,
so that
TON = 0.75 x TRES
The maximum duty cycle (DNORMAL) is therefore nominally 43%. On-time of the switch is controlled to manage
power delivery and is reduced in both low-load and overload conditions. The minimum on-time in overload is
determined by the internal CS blanking, specified as TCSBLANK.
At turn-on of the primary switching transistor, its collector voltage can fall very rapidly, with correspondingly
large current out of or in to the COL pin via the coupling capacitor (Ccol). An on-chip clamp transistor,
controlled by an internal signal called ACTICLAMP, provides a low resistance path to GND. This transistor is
turned on shortly before turn-on of the primary switch and remains on until time TACT after turn-on of the
primary switch. It is then turned off during the remainder of the primary switch on-period. In some
applications, the current through the coupling capacitor may develop sufficient voltage across the clamp
transistor to cause conduction of the ESD protection diodes. This is permissible up to a limit ICOL which is
specified in ABSOLUTE MAXIMUM RATINGS. If, due to application design, the capacitor current could
exceed this level, external protection diodes and a resistor must be provided ( Dcol1, Dcol2 and Rcol in
Figure 3).



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