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RA2A2 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RA2A2 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 116 page  RA2A2 Group Renesas Microcontrollers Ultra low power 48 MHz Arm® Cortex®-M23 core, up to 512-KB code flash memory, 48-KB SRAM, 12-bit A/D Converter, 24-bit Sigma-Delta A/D Converter, LCD Controller/driver, Independent power supply RTC, On-chip 32-bit multiplier and multiply-accumulator, Security and Safety features. Features R01DS0418EJ0130 Rev.1.30 Nov 8, 2025 ■ Arm Cortex-M23 Core ● Armv8-M architecture ● Maximum operating frequency: 48 MHz ● Arm Memory Protection Unit (Arm MPU) with 8 regions ● Debug and Trace: DWT, FPB, CoreSight™ MTB-M23 ● CoreSight Debug Port: SW-DP ■ Memory ● Up to 512-KB code flash memory ● Bank Swap ● Dual bank flash (256 KB × 2 banks) ● 8-KB data flash memory (100,000 program/erase (P/E) cycles) ● 48-KB SRAM ● Memory Protection Units (MPU) ● Memory Mirror Function (MMF) ● 128-bit unique ID ■ Connectivity ● Serial Communications Interface (SCI) × 5 – Asynchronous interfaces – 8-bit clock synchronous interface – Simple IIC – Simple SPI – Smart card interface ● Serial Peripheral Interface (SPI) × 1 ● I2C bus interface (IIC) × 2 ■ Analog ● 24-bit Sigma-Delta A/D Converter (SDADC24) – Sampling rate is 7.813 kHz/8.333 kHz or 3.906 kHz/4.166 kHz – Differential/Single-ended input mode, up to 7 ch – Main clock oscillator (MOSC) 12 MHz or 16 MHz – PLL clock multiplied from Sub-clock oscillator (SOSC) (32.768 kHz) – High-speed on-chip oscillator (HOCO) (24/32/48/64 MHz) ● 12-bit A/D Converter (ADC12) ● Temperature Sensor (TSN) ■ Timers ● General PWM Timer 16-bit (GPT16) × 6 ● 16-bit Low Power Asynchronous General Purpose Timer (AGT) × 8 ● 32-bit Low Power Asynchronous General Purpose Timer (AGTW) × 2 ● Watchdog Timer (WDT) ■ Human Machine Interface (HMI) ● Segment LCD Controller (SLCDC) – Internal voltage boosting method, capacitor split method, and external resistance division method are switchable – Segment signal output: 21 to 45 (when 8 com is not used) – Segment signal output: 17 to 41 (when 8 com is used) – Common signal output: 4 (when 8 com is not used) – Common signal output: 8 (when 8 com is used) – Waveform A or B selectable ■ On-Chip 32-Bit Multiplier and Multiply-Accumulator (MACL) ● 32 bits × 32 bits = 64 bits (unsigned or signed) ● 32 bits × 32 bits + 64 bits = 64 bits (unsigned or signed) ● The results of multiply-and-accumulate operations (cumulative values) can be retained in any of 24 buffer channels and can be accessed with independent address. ■ Safety ● ECC in SRAM ● SRAM parity error check ● Flash area protection ● ADC self-diagnosis function ● Clock Frequency Accuracy Measurement Circuit (CAC) ● Cyclic Redundancy Check (CRC) ● Data Operation Circuit (DOC) ● Port Output Enable for GPT (POEG) ● Independent Watchdog Timer (IWDT) ● GPIO readback level detection ● Register write protection ● Main oscillator stop detection ● Sub and main oscillation stop detection circuit for SDADC24 clock switch ● Illegal memory access ■ Security and Encryption ● AES – Cipher modes of operation: ECB/CBC/CTR/GCM/CMAC/CCM – Encryption key length: 128/256 bits ● True Random Number Generator (TRNG) ■ System and Power Management ● Low power modes ● Event Link Controller (ELC) ● Data Transfer Controller (DTC) ● Power-on reset ● Low Voltage Detection (LVD) with voltage settings ● Low Voltage Detection for EXLVDVBAT pin (select interrupt from 7 levels) ● Low Voltage Detection for VRTC pin (select interrupt from 4 levels) ● Low Voltage Detection for EXLVD pin (select interrupt from 1 level) ● Independent power supply RTC × 1 (calendar for 99 years, alarm function, and clock correction function) ● On-chip RTC power-on-reset (RTCPOR) circuit for VRTC power supply ■ Multiple Clock Sources ● Main clock oscillator (MOSC) (1 to 20 MHz) ● Sub-clock oscillator (SOSC) (32.768 kHz) ● High-speed on-chip oscillator (HOCO) (24/32/48/64 MHz) ● Middle-speed on-chip oscillator (MOCO) (8 MHz) ● Low-speed on-chip oscillator (LOCO) (32.768 kHz) ● Clock trim function for HOCO/MOCO/LOCO ● IWDT-dedicated on-chip oscillator (15 kHz) ● PLL clock for SDADC24 ● Clock out support ■ Up to 77 Pins for General I/O Ports, Including 3 Pins Input Only and 1 Pin Output Only ● 5-V tolerance, open drain, input pull-up ■ Operating Voltage ● VCC: 1.6 to 5.5 V ■ Operating Temperature and Packages ● Ta = -40℃ to +105℃ – 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) – 80-pin LQFP (12 mm × 12 mm, 0.5 mm pitch) – 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) Datasheet R01DS0418EJ0130 Rev.1.30 Nov 8, 2025 Page 1 of 116 |
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