ST72681SLASHR21 datasheet(22/32 Pages) STMICROELECTRONICS

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Electrical characteristics

ST72681

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7.7

I/O port pin characteristics

7.7.1

General characteristics

Subject to general operating conditions for VDD33, fOSC, and TA unless otherwise specified.

Figure 8.

Typical VIL and VIH standard I/Os

Table 19.

Electrical sensitivity values

Symbol

Parameter

Conditions

Class (1)

Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the

JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B

Class strictly covers all the JEDEC criteria (international standard).

Static latch-up class

TA = +25°C

DLU

Dynamic latch-up class

VDD33 = 3.3V, fOSC = 12 MHz, TA = +25°C

Table 20.

General I/O port pin characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

VIL

Input low level voltage

TTL ports

0.16 x

VDD33

VIH

Input high level voltage

0.85 x

VDD33

Vhys

Schmitt trigger voltage hysteresis (1)

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested

in production.

400

Input leakage current

VSS ≤ VIN ≤ VDD33,

standard I/Os

1µA

IL5V

5V tolerant input leakage current

VSS ≤ VIN ≤ VDD33

VIN = 5V, 25°C

RPU

Weak pull-up equivalent resistor (2)

The RPU pull-up equivalent resistor is based on a resistive transistor. This data is based on

characterization results, tested in production at VDD33 max.

VIN = VSS

VDD33 =

3.3V

Vil/Vih (V)

0.5

1.5

2.5

2.7

2.8

2.9

3.1

3.2

3.3

3.4

3.5

3.6

Vdd (V)

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