DPM4102

Version 1.0, May 2026

www.dioo.com

© 2026 Dioo Microcircuits Co., Ltd. Jiangsu

1

1. Pin Assignment and Functions

Figure 1. ECLGA-14 (Top view)

Pin No.

Pin Name

I/O

Description

1,14

VIN

PWR

Supply input voltage.

2

EN

IO

Device enable. Set high to enable and low to disable. It must not be left

floating.

3

MODE

IO

PFM/PWM selection. Set low for power save mode, set high for forced PWM.

It must not be left floating.

4

PG

IO

Power good indication. If the feedback (FB) voltage (VFB) exceeds 91.5% of

the reference voltage (VREF), the PG pin is pulled high. If VFB drops below 76%

of VREF, PG is pulled low.

5

VCC

PWR

Supply voltage for the control stage. The VCC pin is powered from the higher

voltage between the input voltage (VIN) and the output voltage (VOUT). 1 μF

capacitor is used for decoupling VCC.

6

AGND

PWR

Analog ground.

7

NC

/

Not connected.

8

FB

IO

Voltage feedback. Sensing pin.

9,10

VOUT

PWR

Power stage output.

11

SW2

IO

Inductor switching node of the boost stage.

12

PGND

PWR

Power ground.

13

SW1

IO

Inductor switching node of the buck stage.