AS7331 datasheet(62/72 Pages) AMSOSRAM

62 / 72 page

Document Feedback

AS7331

Datasheet

• PUBLIC

DS001047

• v4-00 • 2023-Mar-24

│ 61

The status bit NDATA, is re

set to “0” after reading the status register or at least one measurement

result register.

Figure 56:

Update Time of the Status Register Bits for an Accurate Measurement and Read Behavior

If the buffer registers contain new value

s (NDATA = “1”) and new measurement finishes before an I²C

reading process occurs, the new measurement results are stored in the buffer registers. The older

measurement results are overwritten. The status bit LDATA, shown in Figure 57 indicates this. The

LDATA bit is only reset to “0” by reading the status register, as it allows checking for the loss of

information after multiple measurement cycles.

IDLE

MEASUREMENT 2

RESULTS 1

MEASUREMENT 1

CONFIGURATION

IDLE

TCONV

data

fetch

OSR = 83h

start (OSR:SS ← ‚1')

MRES1 …

MRES3

READY

STATE

I²C activity

RESULTS 2

TCONV

start (OSR:SS ← ‚1')

LDATA = ‚0'

NDATA = ‚0'

data

fetch

LDATA = ‚0'

NDATA = ‚1'

LDATA = ‚0'

NDATA = ‚0'

LDATA = ‚0'

NDATA = ‚1'

LDATA = ‚0'

NDATA = ‚0'

AS7331 Datasheet(PDF) 62 Page - ams-OSRAM AG

AS7331 Datasheet(HTML) 62 Page - ams-OSRAM AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL