LM1812 datasheet(6/10 Pages) NSC

6 / 10 page

Application Hints (Continued)

Delay as a function of C9 is plotted in

Figure 10 The second

gain stage may be shut OFF independently of pin 8 by pull-

ing pin 9 low

Due to the high gain of the receiver care must be taken to

avoid oscillations Oscillation problems are reduced by

keeping the components associated with pins 1 and 4 well

separated (

Figure 11 ) The transducer must be connected

to the circuit with shielded cable This not only helps avoid

oscillation but also reduces electrical noise pick-up As a

last resort receiver gain can be reduced with R3 as in

Fig-

ure 1

PULSE DETECTOR

The pulse detector circuitry (

Figure 12 ) consists of five dis-

tinct stages 1) threshold detector 2) pulse integrator reset

3) pulse integrator 4) output driver 5) power output stage

The detector (Q1 Q2) switches on all pin 1 signals that

exceed 14 Vp-p Since noise pulses are also detected fil-

tering is done by an integrator stage C17 and R17 whose

time constant is typically 10% to 50% of the transmit time

Integration starts when Q3 turns OFF which occurs at the

same moment Q1 and Q2 detect a signal Pins 16 and 14 go

low after the integration delay

TLH7892 – 11

FIGURE 10 Receiver Delay vs C9

TLH7892 – 12

FIGURE 11 Component Side of Layout Showing

Isolation of Receiver Input and Output

TLH7892 – 13

FIGURE 12 Simplified Circuit Diagram of Detector

LM1812 Datasheet(PDF) 6 Page - National Semiconductor (TI)