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ST7283 Datasheet(PDF) 39 Page - Sitronix Technology Co., Ltd.

Part # ST7283
Description  720x544 System-On-Chip Driver for 480RGBx272 TFT LCD
PDF  91 Pages
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Manufacturer  SITRONIX [Sitronix Technology Co., Ltd.]
Direct Link  http://www.sitronix.com.tw
Logo SITRONIX - Sitronix Technology Co., Ltd.

ST7283 Datasheet(HTML) 39 Page - Sitronix Technology Co., Ltd.

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ST7283
Version 1.3
Page 39 of 91
2020/09
7. COMMUNICATION INTERFACE
7.1 3-wire Serial Interface
R/W: Read/Write mode control bit.
R/W=1: Read mode
R/W=0: Write mode
1
3 4
2
5 6 7 8
10 11
9
12 13 14 15 16
Read Mode
CS
SCL
SDA
R
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3 D2
D1
D0
Write Mode
CS
SCL
SDA
W
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3 D2
D1
D0
Next Command
Next Command
a. Each serial command consists of 16 bits of data which is loaded one bit a time at the rising edge of serial
clock SCL.
b. Command loading operation starts from the falling edge of CS and is completed at the next rising edge of
CS.
c. The serial control block is operational after power on reset, but commands are established by the VSYNC
signal. If command is transferred multiple times for the same register, the last command before the VSYNC
signal is valid.
d. If less than 16 bits of SCL are input while CS is low, the transferred data is ignored.
e. If 16 bits or more of SCL are input while CS is low, the previous 16 bits of transferred data before then rising
edge of CS pulse are valid data.
f. Serial block operates with the SCL clock
g. Serial data can be accepted in the power save mode.
h. After power on reset or GRB reset, it is required 100ms delay to begin SPI communication.



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