Electronic Components Datasheet Search
  English  ▼

X  

AD5544ARS Datasheet(PDF) 3 Page - Analog Devices

Part # AD5544ARS
Description  Quad, Current-Output, Serial-Input 16-/14-Bit DACs
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5544ARS Datasheet(HTML) 3 Page - Analog Devices

  AD5544ARS Datasheet HTML 1Page - Analog Devices AD5544ARS Datasheet HTML 2Page - Analog Devices AD5544ARS Datasheet HTML 3Page - Analog Devices AD5544ARS Datasheet HTML 4Page - Analog Devices AD5544ARS Datasheet HTML 5Page - Analog Devices AD5544ARS Datasheet HTML 6Page - Analog Devices AD5544ARS Datasheet HTML 7Page - Analog Devices AD5544ARS Datasheet HTML 8Page - Analog Devices AD5544ARS Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 20 page
background image
AD5544/AD5554
Rev. A | Page 3 of 20
SPECIFICATIONS
AD5544 ELECTRICAL CHARACTERISTICS
VDD = 5 V ±10%, VSS = 0 V, IOUTX = virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless
otherwise noted.
Table 1.
Parameter
Symbol
Condition
Min
Typ
Max
Unit
STATIC PERFORMANCE1
Resolution
N
1 LSB = VREF/216 = 153 µV when VREF = 10 V
16
Bits
Relative Accuracy
INL
±4
LSB
Differential Nonlinearity
DNL
±1.5
LSB
Output Leakage Current
IOUTX
Data = 0000H, TA = 25°C
10
nA
IOUTX
Data = 0000H, TA = TA max
20
nA
Full-Scale Gain Error
GFSE
Data = FFFFH
±0.75
±3
mV
Full-Scale Tempco2
TCVFS
1
ppm/°C
Feedback Resistor
RFBX
VDD = 5 V
4
6
8
kΩ
REFERENCE INPUT
VREFX Range
VREFX
−15
+15
V
Input Resistance
RREFX
4
6
8
kΩ
Input Resistance Match
RREFX
Channel-to-channel
1
%
Input Capacitance2
CREFX
5
pF
ANALOG OUTPUT
Output Current
IOUTX
Data = FFFFH
1.25
2.5
mA
Output Capacitance2
COUTX
Code-dependent
80
pF
LOGIC INPUT AND OUTPUT
Logic Input Low Voltage
VIL
0.8
V
Logic Input High Voltage
VIH
2.4
V
Input Leakage Current
IIL
1
µA
Input Capacitance2
CIL
10
pF
Logic Output Low Voltage
VOL
IOL = 1.6 mA
0.4
V
Logic Output High Voltage
VOH
IOH = 100 µA
4
V
INTERFACE TIMING2, 3
Clock Width High
tCH
25
ns
Clock Width Low
tCL
25
ns
CS to Clock Setup
tCSS
0
ns
Clock to CS Hold
tCSH
25
ns
Clock to SDO Prop Delay
tPD
2
20
ns
Load DAC Pulse Width
tLDAC
25
ns
Data Setup
tDS
20
ns
Data Hold
tDH
20
ns
Load Setup
tLDS
5
ns
Load Hold
tLDH
25
ns
SUPPLY CHARACTERISTICS
Power Supply Range
VDD RANGE
4.5
5.5
V
Positive Supply Current
IDD
Logic inputs = 0 V
50
250
µA
Negative Supply Current
ISS
Logic inputs = 0 V, VSS = –5 V
0.001
1
µA
Power Dissipation
PDISS
Logic inputs = 0 V
1.25
mW
Power Supply Sensitivity
PSS
∆VDD = ±5%
0.006
%/%



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com