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WM8951L Datasheet(PDF) 28 Page - Wolfson Microelectronics plc

Part # WM8951L
Description  Stereo ADC with Microphone Input and Clock Generator
PDF  42 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8951L Datasheet(HTML) 28 Page - Wolfson Microelectronics plc

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WM8951L
Production Data
w
PD Rev 4.1 December 2007
28
The exact sample rates achieved are defined by the relationships in Table 13 below.
ACTUAL SAMPLING RATE
BOSR=0
BOSR=1
TARGET
SAMPLING
RATE
MCLK=12.288
MCLK=11.2896
MCLK=18.432
MCLK=16.9344
kHz
kHz
kHz
kHz
kHz
8
8.018
8
8.018
8
(12.288MHz/256) x 1/6
(11.2896MHz/256) x 2/11
(18.432MHz/384) x 1/6
(16.9344MHz/384) x 2/11
32
32
32
(12.288MHz/256) x 2/3
not available
(18.432MHz/384) x 2/3
not available
44.1
44.1
44.1
not available
11.2896MHz/256
not available
16.9344MHz /384
48
48
48
12.288MHz/256
not available
18.432MHz/384
not available
88.2
88.2
88.2
not available
(11.2896MHz/256) x 2
not available
(16.9344MHz /384) x 2
96
96
96
(12.288MHz/256) x 2
not available
(18.432MHz/384) x 2
not available
Table 13 Normal Mode Actual Sample Rates
128/192fs NORMAL MODE
The Normal Mode sample rates are designed for standard 256fs and 384fs MCLK rates. However the
WM8951L is also capable of being clocked from a 128 or 192fs MCLK for application over limited
sampling rates as shown in the table below.
SAMPLING
RATE
MCLK
FREQUENCY
SAMPLE
RATE
REGISTER SETTINGS
DIGITAL
FILTER
TYPE
kHz
MHz
BOSR
SR3
SR2
SR1
SR0
6.144
0
0
1
1
1
48
9.216
1
0
1
1
1
2
5.6448
0
1
1
1
1
44.1
8.4672
1
1
1
1
1
2
Table 14 128fs Normal Mode Sample Rate Look-up Table
512/768fs NORMAL MODE
512 fs and 768 fs MCLK rates can be accommodated by using the CLKIDIV2 bit (Register 8, bit 6).
The core clock to the DSP will be divided by 2 so an external 512/768 fs MCLK will become 256/384
fs internally and the device otherwise operates as in Table 10 but with MCLK at twice the specified
rate. See Table 7 for software control.



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