R31DS0145EU0116 Rev. 1.16

Page 22

Sep 24, 2025

XK Datasheet

The configuration codes are described in Table 26. Note that all configurations in a device must be of the same

VDD, OE Pin Polarity, and OE Pin Number assignment. The configurations can consist of different output types

and frequencies.

Table 26. Output Configuration Code (X)

Output Type

OE Pin Polarity

OE Pin Number

Code (X)

CML

Active Low

1

D

2

K

Active High

1

P

2

Q

HCSL

Active Low

1

E

2

T

Active High

1

R

2

S

LVCMOS[1]

1. VDD must be 1.8 Volts (voltage code 1).

Active Low

1

A

2

F

Active High

1

H

2

J

LVDS

Active Low

1

B

2

G

Active High

1

L

2

M

LVPECL[2]

2. VDD must be 3.3 Volts (voltage code 3).

Active Low

1

C

2

I

Active High

1

N

2

O