74HC_HCT174

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Product data sheet

Rev. 4 — 12 May 2016

8 of 17

NXP Semiconductors

74HC174; 74HCT174

Hex D-type flip-flop with reset; positive-edge trigger

[1]

tpd is the same as tPHL and tPLH.

[2]

tt is the same as tTHL and tTLH.

[3]

CPD is used to determine the dynamic power dissipation (PD in W).

PD = CPD  VCC2  fi + (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

 (C

L  VCC

2

 f

o) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in V.

74HCT174

tpd

propagation

delay

CP to Qn; see Figure 6

[1]

VCC = 4.5 V

-

21

35

-

44

-

53

ns

VCC = 5.0 V; CL =15pF

-

18

-

-

-

-

-

ns

tPHL

HIGH to LOW

propagation

delay

MR to Qn; see Figure 7

VCC = 4.5 V

-

20

35

-

44

-

53

ns

VCC = 5.0 V; CL =15pF

-

17

-

-

-

-

-

ns

tt

transition time

Qn output; see Figure 6

[2]

VCC = 4.5 V

-

7

15

-

19

-

22

ns

tW

pulse width

CP input; see Figure 6

VCC = 4.5 V

16

7

-

20

-

24

-

ns

MR input LOW;

see Figure 7

VCC = 4.5 V

20

7

-

25

-

30

-

ns

trec

recovery time

MR to CP; see Figure 7

VCC = 4.5 V

12

3

-

15

-

18

-

ns

tsu

set-up time

Dn to CP; see Figure 6

VCC = 4.5 V

16

4

-

20

-

24

-

ns

th

hold time

Dn to CP; see Figure 6

VCC = 4.5 V

5

3-

5

-

5

-

ns

fmax

maximum

frequency

CP input; see Figure 6

VCC = 4.5 V

30

63

-

24

-

20

-

MHz

VCC = 5.0 V; CL =15pF

-

69

-

-

-

-

-

MHz

CPD

power

dissipation

capacitance

per package;

VI =GND to VCC  1.5 V

[3]

-17-

-

-

-

-

pF

Table 7.

Dynamic characteristics …continued

GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8

Symbol Parameter

Conditions

25

C

40 C to +85 C 40 C to +125 C Unit

Min

Typ

Max

Min

Max

Min

Max